From b9ea65597d951bba7602a93e0205342ab50e4d95 Mon Sep 17 00:00:00 2001 From: "Pavel V. Shatov (Meister)" Date: Fri, 9 Nov 2018 18:01:09 +0300 Subject: * Removed unsed port to suppress warning during synthesis * Made private key memory write-only (reading yields 0xDEADCE11), this prevents potential readout of the private key from the core by STM32 --- rtl/ed25519_core_top.v | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'rtl') diff --git a/rtl/ed25519_core_top.v b/rtl/ed25519_core_top.v index a217c75..6bd1c41 100644 --- a/rtl/ed25519_core_top.v +++ b/rtl/ed25519_core_top.v @@ -72,14 +72,15 @@ module ed25519_core_top wire core_bram_qy_rw_wren; wire [31:0] core_bram_k_ro_dout; - wire [31:0] core_bram_qy_rw_dout_unused; +// wire [31:0] core_bram_qy_rw_dout_unused; wire [31:0] core_bram_qy_rw_din; assign user_bram_k_rw_din = bus_data_wr; assign user_bram_k_rw_wren = bus_cs && bus_we && (bus_addr_upper == BUS_ADDR_BANK_K); - bram_1rw_1ro_readfirst # + /* write-only memory here to prevent readback of the private key */ + bram_1wo_1ro_readfirst # ( .MEM_WIDTH(32), .MEM_ADDR_BITS(3) @@ -90,6 +91,7 @@ module ed25519_core_top .b_addr(core_bram_k_ro_addr), .b_out(core_bram_k_ro_dout) ); + /* read-write memory here */ bram_1rw_1ro_readfirst # ( .MEM_WIDTH(32), @@ -98,7 +100,7 @@ module ed25519_core_top bram_qy ( .clk(clk), - .a_addr(core_bram_qy_rw_addr), .a_out(core_bram_qy_rw_dout_unused), .a_wr(core_bram_qy_rw_wren), .a_in(core_bram_qy_rw_din), + .a_addr(core_bram_qy_rw_addr), .a_out( ), .a_wr(core_bram_qy_rw_wren), .a_in(core_bram_qy_rw_din), .b_addr(bus_addr_lower), .b_out(user_bram_qy_ro_dout) ); -- cgit v1.2.3