aboutsummaryrefslogtreecommitdiff
path: root/bench/tb_curve_multiplier_384.v
diff options
context:
space:
mode:
Diffstat (limited to 'bench/tb_curve_multiplier_384.v')
-rw-r--r--bench/tb_curve_multiplier_384.v440
1 files changed, 227 insertions, 213 deletions
diff --git a/bench/tb_curve_multiplier_384.v b/bench/tb_curve_multiplier_384.v
index 163f39f..ad78677 100644
--- a/bench/tb_curve_multiplier_384.v
+++ b/bench/tb_curve_multiplier_384.v
@@ -2,11 +2,11 @@
//
// tb_curve_multiplier_384.v
// -----------------------------------------------------------------------------
-// Testbench for 384-bit curve point scalar multiplier.
+// Testbench for 384-bit curve base point scalar multiplier.
//
// Authors: Pavel Shatov
//
-// Copyright (c) 2016, NORDUnet A/S
+// Copyright (c) 2016, 2018 NORDUnet A/S
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
@@ -36,264 +36,278 @@
//
//------------------------------------------------------------------------------
-//------------------------------------------------------------------------------
-`timescale 1ns / 1ps
-//------------------------------------------------------------------------------
-
module tb_curve_multiplier_384;
- //
- // Test Vectors
- //
-
- /* Q = d * G */
- localparam [383:0] K_1 = 384'hc838b85253ef8dc7394fa5808a5183981c7deef5a69ba8f4f2117ffea39cfcd90e95f6cbc854abacab701d50c1f3cf24;
- localparam [383:0] PX_1 = 384'h1fbac8eebd0cbf35640b39efe0808dd774debff20a2a329e91713baf7d7f3c3e81546d883730bee7e48678f857b02ca0;
- localparam [383:0] PY_1 = 384'heb213103bd68ce343365a8a4c3d4555fa385f5330203bdd76ffad1f3affb95751c132007e1b240353cb0a4cf1693bdf9;
-
- /* R = k * G */
- localparam [383:0] K_2 = 384'hdc6b44036989a196e39d1cdac000812f4bdd8b2db41bb33af51372585ebd1db63f0ce8275aa1fd45e2d2a735f8749359;
- localparam [383:0] PX_2 = 384'ha0c27ec893092dea1e1bd2ccfed3cf945c8134ed0c9f81311a0f4a05942db8dbed8dd59f267471d5462aa14fe72de856;
- localparam [383:0] PY_2 = 384'h855649409815bb91424eaca5fd76c97375d575d1422ec53d343bd33b847fdf0c11569685b528ab25493015428d7cf72b;
-
- /* O = n * G */
- localparam [383:0] K_3 = 384'hffffffffffffffffffffffffffffffffffffffffffffffffc7634d81f4372ddf581a0db248b0a77aecec196accc52973;
- localparam [383:0] PX_3 = 384'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;
- localparam [383:0] PY_3 = 384'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;
-
- /* H = 2 * G */
- localparam [383:0] K_4 = 384'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002;
- localparam [383:0] PX_4 = 384'h08d999057ba3d2d969260045c55b97f089025959a6f434d651d207d19fb96e9e4fe0e86ebe0e64f85b96a9c75295df61;
- localparam [383:0] PY_4 = 384'h8e80f1fa5b1b3cedb7bfe8dffd6dba74b275d875bc6cc43e904e505f256ab4255ffd43e94d39e22d61501e700a940e80;
-
- /* G = (n + 1) * G */
- localparam [383:0] K_5 = 384'hffffffffffffffffffffffffffffffffffffffffffffffffc7634d81f4372ddf581a0db248b0a77aecec196accc52973 + 'd1;
- localparam [383:0] PX_5 = 384'haa87ca22be8b05378eb1c71ef320ad746e1d3b628ba79b9859f741e082542a385502f25dbf55296c3a545e3872760ab7;
- localparam [383:0] PY_5 = 384'h3617de4a96262c6f5d9e98bf9292dc29f8f41dbd289a147ce9da3113b5f0b8c00a60b1ce1d7e819d7a431d7c90ea0e5f;
-
- /* H = (n + 2) * G */
- localparam [383:0] K_6 = 384'hffffffffffffffffffffffffffffffffffffffffffffffffc7634d81f4372ddf581a0db248b0a77aecec196accc52973 + 'd2;
- localparam [383:0] PX_6 = 384'h08d999057ba3d2d969260045c55b97f089025959a6f434d651d207d19fb96e9e4fe0e86ebe0e64f85b96a9c75295df61;
- localparam [383:0] PY_6 = 384'h8e80f1fa5b1b3cedb7bfe8dffd6dba74b275d875bc6cc43e904e505f256ab4255ffd43e94d39e22d61501e700a940e80;
-
-
- //
- // Core Parameters
- //
- localparam WORD_COUNTER_WIDTH = 4;
- localparam OPERAND_NUM_WORDS = 12;
-
-
- //
- // Clock (100 MHz)
- //
- reg clk = 1'b0;
- always #5 clk = ~clk;
-
-
- //
- // Inputs, Outputs
- //
- reg rst_n;
- reg ena;
- wire rdy;
-
-
- //
- // Buffers (K, PX, PY)
- //
- wire [WORD_COUNTER_WIDTH-1:0] core_k_addr;
- wire [WORD_COUNTER_WIDTH-1:0] core_px_addr;
- wire [WORD_COUNTER_WIDTH-1:0] core_py_addr;
-
- wire core_px_wren;
- wire core_py_wren;
-
- wire [ 32-1:0] core_k_data;
- wire [ 32-1:0] core_px_data;
- wire [ 32-1:0] core_py_data;
-
- reg [WORD_COUNTER_WIDTH-1:0] tb_k_addr;
- reg [WORD_COUNTER_WIDTH-1:0] tb_pxy_addr;
-
- reg tb_k_wren;
-
- reg [ 31:0] tb_k_data;
- wire [ 31:0] tb_px_data;
- wire [ 31:0] tb_py_data;
-
- bram_1rw_1ro_readfirst # (.MEM_WIDTH(32), .MEM_ADDR_BITS(WORD_COUNTER_WIDTH))
- bram_k
- ( .clk(clk),
- .a_addr(tb_k_addr), .a_wr(tb_k_wren), .a_in(tb_k_data), .a_out(),
- .b_addr(core_k_addr), .b_out(core_k_data)
- );
-
- bram_1rw_1ro_readfirst # (.MEM_WIDTH(32), .MEM_ADDR_BITS(WORD_COUNTER_WIDTH))
- bram_px
- ( .clk(clk),
- .a_addr(core_px_addr), .a_wr(core_px_wren), .a_in(core_px_data), .a_out(),
- .b_addr(tb_pxy_addr), .b_out(tb_px_data)
- );
-
- bram_1rw_1ro_readfirst # (.MEM_WIDTH(32), .MEM_ADDR_BITS(WORD_COUNTER_WIDTH))
- bram_py
- ( .clk(clk),
- .a_addr(core_py_addr), .a_wr(core_py_wren), .a_in(core_py_data), .a_out(),
- .b_addr(tb_pxy_addr), .b_out(tb_py_data)
- );
-
-
- //
- // UUT
- //
- curve_mul_384 uut
- (
- .clk (clk),
- .rst_n (rst_n),
+ //
+ // Test Vectors
+ //
+ `include "ecdsa384_test_vector_nsa.vh"
+ `include "ecdsa_test_vector_randomized.vh"
+
+
+ //
+ // Core Parameters
+ //
+ localparam WORD_COUNTER_WIDTH = 4;
+ localparam OPERAND_NUM_WORDS = 12;
- .ena (ena),
- .rdy (rdy),
- .k_addr (core_k_addr),
- .rx_addr (core_px_addr),
- .ry_addr (core_py_addr),
+ //
+ // P-384 Domain Parameters
+ //
+ localparam ECDSA_P384_N =
+ {32'hffffffff, 32'hffffffff, 32'hffffffff, 32'hffffffff,
+ 32'hffffffff, 32'hffffffff, 32'hc7634d81, 32'hf4372ddf,
+ 32'h581a0db2, 32'h48b0a77a, 32'hecec196a, 32'hccc52973};
+
+ localparam ECDSA_P384_GX =
+ {32'haa87ca22, 32'hbe8b0537, 32'h8eb1c71e, 32'hf320ad74,
+ 32'h6e1d3b62, 32'h8ba79b98, 32'h59f741e0, 32'h82542a38,
+ 32'h5502f25d, 32'hbf55296c, 32'h3a545e38, 32'h72760ab7};
- .rx_wren (core_px_wren),
- .ry_wren (core_py_wren),
+ localparam ECDSA_P384_GY =
+ {32'h3617de4a, 32'h96262c6f, 32'h5d9e98bf, 32'h9292dc29,
+ 32'hf8f41dbd, 32'h289a147c, 32'he9da3113, 32'hb5f0b8c0,
+ 32'h0a60b1ce, 32'h1d7e819d, 32'h7a431d7c, 32'h90ea0e5f};
- .k_din (core_k_data),
+ localparam ECDSA_P384_HX =
+ {32'h08d99905, 32'h7ba3d2d9, 32'h69260045, 32'hc55b97f0,
+ 32'h89025959, 32'ha6f434d6, 32'h51d207d1, 32'h9fb96e9e,
+ 32'h4fe0e86e, 32'hbe0e64f8, 32'h5b96a9c7, 32'h5295df61};
- .rx_dout (core_px_data),
- .ry_dout (core_py_data)
- );
+ localparam ECDSA_P384_HY =
+ {32'h8e80f1fa, 32'h5b1b3ced, 32'hb7bfe8df, 32'hfd6dba74,
+ 32'hb275d875, 32'hbc6cc43e, 32'h904e505f, 32'h256ab425,
+ 32'h5ffd43e9, 32'h4d39e22d, 32'h61501e70, 32'h0a940e80};
+
+
+ //
+ // Clock (100 MHz)
+ //
+ reg clk = 1'b0;
+ always #5 clk = ~clk;
+
+
+ //
+ // Inputs, Outputs
+ //
+ reg rst_n;
+ reg ena;
+ wire rdy;
+
+
+ //
+ // Buffers (K, PX, PY)
+ //
+ wire [WORD_COUNTER_WIDTH-1:0] core_k_addr;
+ wire [WORD_COUNTER_WIDTH-1:0] core_pxy_addr;
+
+ wire core_px_wren;
+ wire core_py_wren;
+
+ wire [ 32-1:0] core_k_data;
+ wire [ 32-1:0] core_pxy_data;
+
+ reg [WORD_COUNTER_WIDTH-1:0] tb_k_addr;
+ reg [WORD_COUNTER_WIDTH-1:0] tb_pxy_addr;
+
+ reg tb_k_wren;
+
+ reg [ 31:0] tb_k_data;
+ wire [ 31:0] tb_px_data;
+ wire [ 31:0] tb_py_data;
+
+ bram_1rw_1ro_readfirst # (.MEM_WIDTH(32), .MEM_ADDR_BITS(WORD_COUNTER_WIDTH))
+ bram_k
+ ( .clk(clk),
+ .a_addr(tb_k_addr), .a_wr(tb_k_wren), .a_in(tb_k_data), .a_out(),
+ .b_addr(core_k_addr), .b_out(core_k_data)
+ );
+
+ bram_1rw_1ro_readfirst # (.MEM_WIDTH(32), .MEM_ADDR_BITS(WORD_COUNTER_WIDTH))
+ bram_px
+ ( .clk(clk),
+ .a_addr(core_pxy_addr), .a_wr(core_px_wren), .a_in(core_pxy_data), .a_out(),
+ .b_addr(tb_pxy_addr), .b_out(tb_px_data)
+ );
+
+ bram_1rw_1ro_readfirst # (.MEM_WIDTH(32), .MEM_ADDR_BITS(WORD_COUNTER_WIDTH))
+ bram_py
+ ( .clk(clk),
+ .a_addr(core_pxy_addr), .a_wr(core_py_wren), .a_in(core_pxy_data), .a_out(),
+ .b_addr(tb_pxy_addr), .b_out(tb_py_data)
+ );
+
+
+ //
+ // UUT
+ //
+ ecdsa384_base_point_multiplier uut
+ (
+ .clk (clk),
+ .rst_n (rst_n),
+
+ .ena (ena),
+ .rdy (rdy),
+
+ .k_addr (core_k_addr),
+ .rxy_addr (core_pxy_addr),
+
+ .rx_wren (core_px_wren),
+ .ry_wren (core_py_wren),
+
+ .k_din (core_k_data),
+ .rxy_dout (core_pxy_data)
+ );
- //
- // Testbench Routine
- //
- reg ok = 1;
- initial begin
- /* initialize control inputs */
- rst_n = 0;
- ena = 0;
+ //
+ // Testbench Routine
+ //
+ reg ok = 1;
+ initial begin
- /* wait for some time */
- #200;
+ /* initialize control inputs */
+ rst_n = 0;
+ ena = 0;
+
+ /* wait for some time */
+ #200;
+
+ /* de-assert reset */
+ rst_n = 1;
+
+ /* wait for some time */
+ #100;
+
+ /* run tests */
+ $display("1. Q1 = d1 * G...");
+ test_curve_multiplier(ECDSA_P384_D_NSA, ECDSA_P384_QX_NSA, ECDSA_P384_QY_NSA);
+
+ $display("2. R = k * G...");
+ test_curve_multiplier(ECDSA_P384_K_NSA, ECDSA_P384_RX_NSA, ECDSA_P384_RY_NSA);
+
+ $display("3. Q2 = d2 * G...");
+ test_curve_multiplier(ECDSA_P384_D_RANDOM, ECDSA_P384_QX_RANDOM, ECDSA_P384_QY_RANDOM);
- /* de-assert reset */
- rst_n = 1;
+ $display("4. O = n * G...");
+ test_curve_multiplier(ECDSA_P384_N, 384'd0, 384'd0);
- /* wait for some time */
- #100;
+ $display("5. G = (n + 1) * G...");
+ test_curve_multiplier(ECDSA_P384_N + 384'd1, ECDSA_P384_GX, ECDSA_P384_GY);
- /* run tests */
- //test_curve_multiplier(K_1, PX_1, PY_1);
- //test_curve_multiplier(K_2, PX_2, PY_2);
- //test_curve_multiplier(K_3, PX_3, PY_3);
- //test_curve_multiplier(K_4, PX_4, PY_4);
- //test_curve_multiplier(K_5, PX_5, PY_5);
- test_curve_multiplier(K_6, PX_6, PY_6);
+ $display("6. H = 2 * G...");
+ test_curve_multiplier(384'd2, ECDSA_P384_HX, ECDSA_P384_HY);
- /* print result */
- if (ok) $display("tb_curve_multiplier_384: SUCCESS");
- else $display("tb_curve_multiplier_384: FAILURE");
- //
- //$finish;
- //
- end
+ $display("7. H = (n + 2) * G...");
+ test_curve_multiplier(ECDSA_P384_N + 384'd2, ECDSA_P384_HX, ECDSA_P384_HY);
+ /* print result */
+ if (ok) $display("tb_curve_multiplier_384: SUCCESS");
+ else $display("tb_curve_multiplier_384: FAILURE");
- //
- // Test Task
- //
- reg p_ok;
+ //$finish;
- integer w;
+ end
- task test_curve_multiplier;
- input [383:0] k;
- input [383:0] px;
- input [383:0] py;
+ //
+ // Test Task
+ //
+ reg p_ok;
- reg [383:0] k_shreg;
- reg [383:0] px_shreg;
- reg [383:0] py_shreg;
+ integer w;
- begin
+ task test_curve_multiplier;
+
+ input [383:0] k;
+ input [383:0] px;
+ input [383:0] py;
- /* start filling memories */
- tb_k_wren = 1;
+ reg [383:0] k_shreg;
+ reg [383:0] px_shreg;
+ reg [383:0] py_shreg;
- /* initialize shift registers */
- k_shreg = k;
+ begin
+
+ /* start filling memories */
+ tb_k_wren = 1;
- /* write all the words */
- for (w=0; w<OPERAND_NUM_WORDS; w=w+1) begin
+ /* initialize shift registers */
+ k_shreg = k;
- /* set addresses */
- tb_k_addr = w[WORD_COUNTER_WIDTH-1:0];
+ /* write all the words */
+ for (w=0; w<OPERAND_NUM_WORDS; w=w+1) begin
- /* set data words */
- tb_k_data = k_shreg[31:0];
+ /* set addresses */
+ tb_k_addr = w[WORD_COUNTER_WIDTH-1:0];
- /* shift inputs */
- k_shreg = {{32{1'bX}}, k_shreg[383:32]};
+ /* set data words */
+ tb_k_data = k_shreg[31:0];
- /* wait for 1 clock tick */
- #10;
+ /* shift inputs */
+ k_shreg = {{32{1'bX}}, k_shreg[383:32]};
- end
+ /* wait for 1 clock tick */
+ #10;
- /* wipe addresses */
- tb_k_addr = {WORD_COUNTER_WIDTH{1'bX}};
+ end
- /* wipe data words */
- tb_k_data = {32{1'bX}};
+ /* wipe addresses */
+ tb_k_addr = {WORD_COUNTER_WIDTH{1'bX}};
- /* stop filling memories */
- tb_k_wren = 0;
+ /* wipe data words */
+ tb_k_data = {32{1'bX}};
- /* start operation */
- ena = 1;
+ /* stop filling memories */
+ tb_k_wren = 0;
- /* clear flag */
- #10 ena = 0;
+ /* start operation */
+ ena = 1;
- /* wait for operation to complete */
- while (!rdy) #10;
+ /* clear flag */
+ #10 ena = 0;
- /* read result */
- for (w=0; w<OPERAND_NUM_WORDS; w=w+1) begin
+ /* wait for operation to complete */
+ while (!rdy) #10;
- /* set address */
- tb_pxy_addr = w[WORD_COUNTER_WIDTH-1:0];
+ /* read result */
+ for (w=0; w<OPERAND_NUM_WORDS; w=w+1) begin
- /* wait for 1 clock tick */
- #10;
+ /* set address */
+ tb_pxy_addr = w[WORD_COUNTER_WIDTH-1:0];
- /* store data word */
- px_shreg = {tb_px_data, px_shreg[383:32]};
- py_shreg = {tb_py_data, py_shreg[383:32]};
+ /* wait for 1 clock tick */
+ #10;
- end
+ /* store data word */
+ px_shreg = {tb_px_data, px_shreg[383:32]};
+ py_shreg = {tb_py_data, py_shreg[383:32]};
- /* compare */
- p_ok = (px_shreg == px) &&
- (py_shreg == py);
+ end
- /* display results */
- $display("test_curve_multiplier(): %s", p_ok ? "OK" : "ERROR");
+ /* compare */
+ p_ok = (px_shreg === px) &&
+ (py_shreg === py);
- /* update global flag */
- ok = ok && p_ok;
+ /* display results */
+ if (p_ok) $display("test_curve_multiplier(): OK");
+ else begin
+ $display("test_curve_multiplier(): ERROR");
+ $display("ref_px == %x", px);
+ $display("calc_px == %x", px_shreg);
+ $display("ref_py == %x", py);
+ $display("calc_py == %x", py_shreg);
+ end
- end
+ /* update global flag */
+ ok = ok && p_ok;
+
+ end
- endtask
+ endtask
endmodule