From affada8d5da7426d22035360c3674ab3b3311ab5 Mon Sep 17 00:00:00 2001 From: "Pavel V. Shatov (Meister)" Date: Thu, 3 Oct 2019 16:40:25 +0300 Subject: Reworked storage architecture (moved I/O memory to a separate module, since there's only one instance of input/output values, while storage manager has dual storage space for P and Q multipliers). Started working on microcoded layer, added input operation and modular multiplication. --- rtl/modexpng_storage_manager.v | 56 +++++++++++++++++++++++++++++++----------- 1 file changed, 41 insertions(+), 15 deletions(-) (limited to 'rtl/modexpng_storage_manager.v') diff --git a/rtl/modexpng_storage_manager.v b/rtl/modexpng_storage_manager.v index e5ac83f..6b34bed 100644 --- a/rtl/modexpng_storage_manager.v +++ b/rtl/modexpng_storage_manager.v @@ -36,7 +36,19 @@ module modexpng_storage_manager rcmb_narrow_xy_bank, rcmb_narrow_xy_addr, rcmb_narrow_x_din, - rcmb_narrow_y_din + rcmb_narrow_y_din, + + rdct_wide_xy_bank, + rdct_wide_xy_addr, + rdct_wide_x_din, + rdct_wide_y_din, + rdct_wide_xy_valid, + + rdct_narrow_xy_bank, + rdct_narrow_xy_addr, + rdct_narrow_x_din, + rdct_narrow_y_din, + rdct_narrow_xy_valid ); @@ -76,18 +88,30 @@ module modexpng_storage_manager input [ WORD_EXT_W -1:0] ext_narrow_x_din; input [ WORD_EXT_W -1:0] ext_narrow_y_din; - input rcmb_wide_xy_ena; - input [ BANK_ADDR_W -1:0] rcmb_wide_xy_bank; + input rcmb_wide_xy_ena; + input [BANK_ADDR_W -1:0] rcmb_wide_xy_bank; input [ 7:0] rcmb_wide_xy_addr; input [17:0] rcmb_wide_x_din; input [17:0] rcmb_wide_y_din; - input rcmb_narrow_xy_ena; - input [ BANK_ADDR_W -1:0] rcmb_narrow_xy_bank; + input rcmb_narrow_xy_ena; + input [BANK_ADDR_W -1:0] rcmb_narrow_xy_bank; input [ 7:0] rcmb_narrow_xy_addr; input [17:0] rcmb_narrow_x_din; input [17:0] rcmb_narrow_y_din; + input [ 2:0] rdct_wide_xy_bank; + input [ 7:0] rdct_wide_xy_addr; + input [ 17:0] rdct_wide_x_din; + input [ 17:0] rdct_wide_y_din; + input rdct_wide_xy_valid; + + input [ 2:0] rdct_narrow_xy_bank; + input [ 7:0] rdct_narrow_xy_addr; + input [ 17:0] rdct_narrow_x_din; + input [ 17:0] rdct_narrow_y_din; + input rdct_narrow_xy_valid; + reg wr_wide_xy_ena_reg = 1'b0; reg [BANK_ADDR_W -1:0] wr_wide_xy_bank_reg; reg [ OP_ADDR_W -1:0] wr_wide_xy_addr_reg; @@ -152,35 +176,37 @@ module modexpng_storage_manager task disable_wide; begin - _update_wide(1'b0, BANK_DONT_CARE, OP_ADDR_DONT_CARE, WORD_EXT_DONT_CARE, WORD_EXT_DONT_CARE); + _update_wide(1'b0, BANK_DNC, OP_ADDR_DNC, WORD_EXT_DNC, WORD_EXT_DNC); end endtask task disable_narrow; begin - _update_narrow(1'b0, BANK_DONT_CARE, OP_ADDR_DONT_CARE, WORD_EXT_DONT_CARE, WORD_EXT_DONT_CARE); + _update_narrow(1'b0, BANK_DNC, OP_ADDR_DNC, WORD_EXT_DNC, WORD_EXT_DNC); end endtask always @(posedge clk) // - if (rst) disable_wide; + if (rst) disable_wide; else begin // - if (ext_wide_xy_ena) enable_wide(ext_wide_xy_bank, ext_wide_xy_addr, ext_wide_x_din, ext_wide_y_din); - else if (rcmb_wide_xy_ena) enable_wide(rcmb_wide_xy_bank, rcmb_wide_xy_addr, rcmb_wide_x_din, rcmb_wide_y_din); - else disable_wide; + if (ext_wide_xy_ena) enable_wide(ext_wide_xy_bank, ext_wide_xy_addr, ext_wide_x_din, ext_wide_y_din); + else if (rcmb_wide_xy_ena) enable_wide(rcmb_wide_xy_bank, rcmb_wide_xy_addr, rcmb_wide_x_din, rcmb_wide_y_din); + else if (rdct_wide_xy_valid) enable_wide(rdct_wide_xy_bank, rdct_wide_xy_addr, rdct_wide_x_din, rdct_wide_y_din); + else disable_wide; // end always @(posedge clk) // - if (rst) disable_narrow; + if (rst) disable_narrow; else begin // - if (ext_narrow_xy_ena) enable_narrow(ext_narrow_xy_bank, ext_narrow_xy_addr, ext_narrow_x_din, ext_narrow_y_din); - else if (rcmb_narrow_xy_ena) enable_narrow(rcmb_narrow_xy_bank, rcmb_narrow_xy_addr, rcmb_narrow_x_din, rcmb_narrow_y_din); - else disable_narrow; + if (ext_narrow_xy_ena) enable_narrow(ext_narrow_xy_bank, ext_narrow_xy_addr, ext_narrow_x_din, ext_narrow_y_din); + else if (rcmb_narrow_xy_ena) enable_narrow(rcmb_narrow_xy_bank, rcmb_narrow_xy_addr, rcmb_narrow_x_din, rcmb_narrow_y_din); + else if (rdct_narrow_xy_valid) enable_narrow(rdct_narrow_xy_bank, rdct_narrow_xy_addr, rdct_narrow_x_din, rdct_narrow_y_din); + else disable_narrow; // end -- cgit v1.2.3