From 71f70252dfc7e41103dde420a721be8aa48486d5 Mon Sep 17 00:00:00 2001 From: "Pavel V. Shatov (Meister)" Date: Tue, 1 Oct 2019 16:18:33 +0300 Subject: Redesigned core architecture, unified bank structure. All storage blocks now have eight 4kbit entries and occupy one 36K BRAM tile. --- rtl/modexpng_dsp48e1.vh | 8 ++++++++ 1 file changed, 8 insertions(+) create mode 100644 rtl/modexpng_dsp48e1.vh (limited to 'rtl/modexpng_dsp48e1.vh') diff --git a/rtl/modexpng_dsp48e1.vh b/rtl/modexpng_dsp48e1.vh new file mode 100644 index 0000000..bc3d55c --- /dev/null +++ b/rtl/modexpng_dsp48e1.vh @@ -0,0 +1,8 @@ +localparam DSP48E1_A_W = 30; +localparam DSP48E1_B_W = 18; +localparam DSP48E1_C_W = 48; +localparam DSP48E1_D_W = 25; +localparam DSP48E1_P_W = 48; +localparam DSP48E1_INMODE_W = 5; +localparam DSP48E1_OPMODE_W = 7; +localparam DSP48E1_ALUMODE_W = 4; -- cgit v1.2.3