Age | Commit message (Collapse) | Author | |
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2020-01-20 | * DSP slices now have two use modes: MULT and ADD/SUB | Pavel V. Shatov (Meister) | |
* cosmetic rename of Verilog include file |
index : core/math/modexpng | ||
"Next-generation" modular exponentiation using specialized DSP slices present in Artix-7 FPGA | git repositories |
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Age | Commit message (Collapse) | Author | |
---|---|---|---|
2020-01-20 | * DSP slices now have two use modes: MULT and ADD/SUB | Pavel V. Shatov (Meister) | |
* cosmetic rename of Verilog include file |