core/math/modexpng - "Next-generation" modular exponentiation using specialized DSP slices present in Artix-7 FPGA

Age	Commit message (Expand)	Author
2019-10-01	Moved to "modexpng_fpga_model" repo, this one was meant for Verilog.	Pavel V. Shatov (Meister)
2019-08-19	* More cleanup (got rid of .wide. and .narrow.)	Pavel V. Shatov (Meister)
2019-08-19	* MASSIVE CLEANUP	Pavel V. Shatov (Meister)
2019-08-19	* Added more micro-operations	Pavel V. Shatov (Meister)
2019-08-19	* Started conversion of the model to use micro-operations	Pavel V. Shatov (Meister)
2019-08-19	* Added more debugging options:	Pavel V. Shatov (Meister)
2019-04-04	Intermediate version to fix recombinaton overflow bug.	Pavel V. Shatov (Meister)
2019-04-02	Removed some boilerplate code, all the three multiplication flavours are now	Pavel V. Shatov (Meister)
2019-04-02	Cosmetic fixes.	Pavel V. Shatov (Meister)
2019-04-02	Same changes for "triangle" multiplication phase as for the "square" one	Pavel V. Shatov (Meister)
2019-04-02	Rewrote "square" recombination to match how it works in hardware.	Pavel V. Shatov (Meister)
2019-03-30	* more debugging output	Pavel V. Shatov (Meister)
2019-03-24	Simplified index calculation and accumulator clearing logic.	Pavel V. Shatov (Meister)
2019-03-23	Added optional output of intermediate quantities for debugging.	Pavel V. Shatov (Meister)
2019-03-23	Mutate blinding tuple.	Pavel V. Shatov (Meister)
2019-03-23	Added blinding into math model.	Pavel V. Shatov (Meister)
2019-03-23	ModExpNG ("Next Generation") math model.	Pavel V. Shatov (Meister)