core/math/modexpng - "Next-generation" modular exponentiation using specialized DSP slices present in Artix-7 FPGA

Age	Commit message (Collapse)	Author
2019-10-21	Redesigned the testbench. Core clock does not necessarily need to be twice	Pavel V. Shatov (Meister)
	faster than the bus clock now. It can be the same, or say four times faster.
2019-10-21	Entire CRT signature algorithm works by now.	Pavel V. Shatov (Meister)
	Moved micro-operations handler into a separate module file, this way we don't have any synthesized stuff in the top-level module, just instantiations. This is more consistent from the design partitioning point of view. Btw, Xilinx claims their tools work better that way too, but who knows... Added optional simulation-only code to assist debugging. Un-comment the ENABLE_DEBUG `define in 'rtl/modexpng_parameters.vh' to use, but don't ever try to synthesize the core with debugging enabled.
2019-10-21	Refactored general worker module	Pavel V. Shatov (Meister)
	Added modular subtraction micro-operation
2019-10-03	Added more micro-operations, entire Montgomery exponentiation ladder works now.	Pavel V. Shatov (Meister)

2019-10-01	Implemented the final stage of the Montgomery modular multiplication, i.e.	Pavel V. Shatov (Meister)
	addition of AB and M then reduction by right-shift.
2019-10-01	Further work on the Montgomery modular multiplier. Added the third	Pavel V. Shatov (Meister)
	"rectangular" stage of the multiplication process, i.e. computation of how many copies of the modulus N to add to the intermediate product AB to zeroize the lower half: M = Q * N.
2019-10-01	Further work on the Montgomery modular multiplier. Can now to the "triangular"	Pavel V. Shatov (Meister)
	part of multiplication, i.e. compute the "magic" reduction coefficient Q = LSB(AB) * N_COEFF.
2019-10-01	Started working on the pipelined Montgomery modular multiplier. Currently can	Pavel V. Shatov (Meister)
	do the "square" part of the multiplication, i.e. compute the twice larger intermediate product AB = A * B.