diff options
Diffstat (limited to 'rtl')
| -rw-r--r-- | rtl/modexpng_io_manager.v | 130 | ||||
| -rw-r--r-- | rtl/modexpng_io_manager_debug.vh | 2 |
2 files changed, 66 insertions, 66 deletions
diff --git a/rtl/modexpng_io_manager.v b/rtl/modexpng_io_manager.v index 466f1ea..fdbc4af 100644 --- a/rtl/modexpng_io_manager.v +++ b/rtl/modexpng_io_manager.v @@ -173,22 +173,22 @@ module modexpng_io_manager // // FSM Declaration // - localparam [3:0] IO_FSM_STATE_IDLE_X = 4'h0; - localparam [3:0] IO_FSM_STATE_LATENCY_PRE1_X = 4'h1; - localparam [3:0] IO_FSM_STATE_LATENCY_PRE2_X = 4'h2; - localparam [3:0] IO_FSM_STATE_LATENCY_PRE3_X = 4'h3; - localparam [3:0] IO_FSM_STATE_LATENCY_PRE4_X = 4'h4; - localparam [3:0] IO_FSM_STATE_BUSY1_X = 4'hA; - localparam [3:0] IO_FSM_STATE_BUSY2_X = 4'hB; - localparam [3:0] IO_FSM_STATE_EXTRA1_X = 4'hC; - localparam [3:0] IO_FSM_STATE_EXTRA2_X = 4'hD; - localparam [3:0] IO_FSM_STATE_LATENCY_POST1_X = 4'h5; - localparam [3:0] IO_FSM_STATE_LATENCY_POST2_X = 4'h6; - localparam [3:0] IO_FSM_STATE_LATENCY_POST3_X = 4'h7; - localparam [3:0] IO_FSM_STATE_LATENCY_POST4_X = 4'h8; - localparam [3:0] IO_FSM_STATE_STOP_X = 4'hF; - - reg [3:0] io_fsm_state = IO_FSM_STATE_IDLE_X; + localparam [3:0] IO_FSM_STATE_IDLE = 4'h0; + localparam [3:0] IO_FSM_STATE_LATENCY_PRE1 = 4'h1; + localparam [3:0] IO_FSM_STATE_LATENCY_PRE2 = 4'h2; + localparam [3:0] IO_FSM_STATE_LATENCY_PRE3 = 4'h3; + localparam [3:0] IO_FSM_STATE_LATENCY_PRE4 = 4'h4; + localparam [3:0] IO_FSM_STATE_BUSY1 = 4'hA; + localparam [3:0] IO_FSM_STATE_BUSY2 = 4'hB; + localparam [3:0] IO_FSM_STATE_EXTRA1 = 4'hC; + localparam [3:0] IO_FSM_STATE_EXTRA2 = 4'hD; + localparam [3:0] IO_FSM_STATE_LATENCY_POST1 = 4'h5; + localparam [3:0] IO_FSM_STATE_LATENCY_POST2 = 4'h6; + localparam [3:0] IO_FSM_STATE_LATENCY_POST3 = 4'h7; + localparam [3:0] IO_FSM_STATE_LATENCY_POST4 = 4'h8; + localparam [3:0] IO_FSM_STATE_STOP = 4'hF; + + reg [3:0] io_fsm_state = IO_FSM_STATE_IDLE; reg [3:0] io_fsm_state_next; wire [3:0] io_fsm_state_after_busy; @@ -363,7 +363,7 @@ module modexpng_io_manager always @(posedge clk) // - if (io_fsm_state_next == IO_FSM_STATE_LATENCY_PRE1_X) begin + if (io_fsm_state_next == IO_FSM_STATE_LATENCY_PRE1) begin // if (opcode_is_ladder_init) begin ladder_index <= ladder_steps; @@ -416,13 +416,13 @@ module modexpng_io_manager // case (io_fsm_state) // - IO_FSM_STATE_BUSY1_X: + IO_FSM_STATE_BUSY1: if (opcode_is_ladder) ladder_d_r <= ladder_dpq_mux; // - IO_FSM_STATE_LATENCY_POST1_X: + IO_FSM_STATE_LATENCY_POST1: if (opcode_is_ladder) ladder_p_r <= ladder_dpq_mux; // - IO_FSM_STATE_LATENCY_POST3_X: + IO_FSM_STATE_LATENCY_POST3: if (opcode_is_ladder) ladder_q_r <= ladder_dpq_mux; // endcase @@ -438,14 +438,14 @@ module modexpng_io_manager in_2_en <= 1'b0; end else case (io_fsm_state_next) // - IO_FSM_STATE_LATENCY_PRE1_X, - IO_FSM_STATE_LATENCY_PRE3_X, - IO_FSM_STATE_BUSY1_X: begin + IO_FSM_STATE_LATENCY_PRE1, + IO_FSM_STATE_LATENCY_PRE3, + IO_FSM_STATE_BUSY1: begin in_1_en <= opcode_is_input && sel_aux_is_1; in_2_en <= (opcode_is_input && sel_aux_is_2) || opcode_is_ladder; end // - IO_FSM_STATE_EXTRA1_X: begin + IO_FSM_STATE_EXTRA1: begin in_1_en <= opcode_is_input && sel_aux_is_1 && sel_in_needs_extra; in_2_en <= opcode_is_input && sel_aux_is_2 && sel_in_needs_extra; end @@ -474,9 +474,9 @@ module modexpng_io_manager // end else case (io_fsm_state) // - IO_FSM_STATE_BUSY1_X, - IO_FSM_STATE_EXTRA1_X, - IO_FSM_STATE_LATENCY_POST1_X: begin + IO_FSM_STATE_BUSY1, + IO_FSM_STATE_EXTRA1, + IO_FSM_STATE_LATENCY_POST1: begin // wide_xy_ena_x <= opcode_is_input_wide && sel_crt_is_x; wide_xy_ena_y <= opcode_is_input_wide && sel_crt_is_y; @@ -487,7 +487,7 @@ module modexpng_io_manager // end // - IO_FSM_STATE_LATENCY_POST3_X: begin + IO_FSM_STATE_LATENCY_POST3: begin // wide_xy_ena_x <= 1'b0; wide_xy_ena_y <= 1'b0; @@ -548,9 +548,9 @@ module modexpng_io_manager // case (io_fsm_state) // - IO_FSM_STATE_BUSY1_X, - IO_FSM_STATE_EXTRA1_X, - IO_FSM_STATE_LATENCY_POST1_X: begin + IO_FSM_STATE_BUSY1, + IO_FSM_STATE_EXTRA1, + IO_FSM_STATE_LATENCY_POST1: begin // if (opcode_is_input_wide && sel_crt_is_x) {wide_x_din_x, wide_y_din_x} <= {2{io_in_dout_mux}}; if (opcode_is_input_wide && sel_crt_is_y) {wide_x_din_y, wide_y_din_y} <= {2{io_in_dout_mux}}; @@ -561,7 +561,7 @@ module modexpng_io_manager // end // - IO_FSM_STATE_LATENCY_POST3_X: begin + IO_FSM_STATE_LATENCY_POST3: begin // if (opcode_is_input_narrow && sel_crt_is_x && sel_in_needs_extra) {narrow_x_din_x, narrow_y_din_x} <= {2{io_in_dout_mux}}; if (opcode_is_input_narrow && sel_crt_is_y && sel_in_needs_extra) {narrow_x_din_y, narrow_y_din_y} <= {2{io_in_dout_mux}}; @@ -609,9 +609,9 @@ module modexpng_io_manager // case (io_fsm_state) // - IO_FSM_STATE_BUSY1_X, - IO_FSM_STATE_EXTRA1_X, - IO_FSM_STATE_LATENCY_POST1_X: begin + IO_FSM_STATE_BUSY1, + IO_FSM_STATE_EXTRA1, + IO_FSM_STATE_LATENCY_POST1: begin if (opcode_is_input_wide && sel_crt_is_x) {wide_xy_bank_x, wide_xy_addr_x } <= {sel_out, in_addr_op_mux }; if (opcode_is_input_wide && sel_crt_is_y) {wide_xy_bank_y, wide_xy_addr_y } <= {sel_out, in_addr_op_mux }; if (opcode_is_input_narrow && sel_crt_is_x) {narrow_xy_bank_x, narrow_xy_addr_x} <= {sel_out, in_addr_op_mux }; @@ -619,7 +619,7 @@ module modexpng_io_manager if (opcode_is_output ) {out_addr_bank, out_addr_op} <= {sel_out, dummy_addr_op_dly4}; end // - IO_FSM_STATE_LATENCY_POST3_X: begin + IO_FSM_STATE_LATENCY_POST3: begin if (opcode_is_input_narrow && sel_crt_is_x && sel_in_needs_extra) {narrow_xy_bank_x, narrow_xy_addr_x} <= {BANK_NARROW_EXT, OP_ADDR_EXT_COEFF }; if (opcode_is_input_narrow && sel_crt_is_y && sel_in_needs_extra) {narrow_xy_bank_y, narrow_xy_addr_y} <= {BANK_NARROW_EXT, OP_ADDR_EXT_COEFF }; if (opcode_is_output ) {out_addr_bank, out_addr_op } <= {sel_out, dummy_addr_op_dly4}; @@ -653,7 +653,7 @@ module modexpng_io_manager // case (io_fsm_state_next) // - IO_FSM_STATE_LATENCY_PRE1_X: begin + IO_FSM_STATE_LATENCY_PRE1: begin // {in_1_addr_bank, in_1_addr_op } <= {sel_in, OP_ADDR_ZERO}; if (!opcode_is_ladder) {in_2_addr_bank, in_2_addr_op } <= {sel_in, OP_ADDR_ZERO}; @@ -662,7 +662,7 @@ module modexpng_io_manager // end // - IO_FSM_STATE_LATENCY_PRE3_X: begin + IO_FSM_STATE_LATENCY_PRE3: begin // {in_1_addr_bank, in_1_addr_op } <= in_1_addr_next; if (!opcode_is_ladder) {in_2_addr_bank, in_2_addr_op } <= in_2_addr_next; @@ -671,7 +671,7 @@ module modexpng_io_manager // end // - IO_FSM_STATE_BUSY1_X: begin + IO_FSM_STATE_BUSY1: begin // {in_1_addr_bank, in_1_addr_op } <= in_1_addr_next; {in_2_addr_bank, in_2_addr_op } <= in_2_addr_next; @@ -679,7 +679,7 @@ module modexpng_io_manager // end // - IO_FSM_STATE_EXTRA1_X: + IO_FSM_STATE_EXTRA1: // if (opcode_is_input && sel_in_needs_extra) begin // @@ -696,7 +696,7 @@ module modexpng_io_manager // case (io_fsm_state_next) // - IO_FSM_STATE_LATENCY_PRE1_X: begin + IO_FSM_STATE_LATENCY_PRE1: begin // in_1_addr_next <= {sel_in, OP_ADDR_ONE}; in_2_addr_next <= {sel_in, OP_ADDR_ONE}; @@ -704,7 +704,7 @@ module modexpng_io_manager // end // - IO_FSM_STATE_LATENCY_PRE3_X: begin + IO_FSM_STATE_LATENCY_PRE3: begin // in_1_addr_next <= in_1_addr_next + 1'b1; if (!opcode_is_ladder) in_2_addr_next <= in_2_addr_next + 1'b1; @@ -713,7 +713,7 @@ module modexpng_io_manager // end // - IO_FSM_STATE_BUSY1_X: begin + IO_FSM_STATE_BUSY1: begin // in_1_addr_next <= in_1_addr_next + 1'b1; if (!opcode_is_ladder) in_2_addr_next <= in_2_addr_next + 1'b1; @@ -722,7 +722,7 @@ module modexpng_io_manager // end // - IO_FSM_STATE_EXTRA1_X: + IO_FSM_STATE_EXTRA1: // if (opcode_is_input && sel_in_needs_extra) begin // @@ -741,7 +741,7 @@ module modexpng_io_manager // case (io_fsm_state_next) // - IO_FSM_STATE_BUSY1_X: begin + IO_FSM_STATE_BUSY1: begin in_1_addr_op_is_last <= in_1_addr_op_next == word_index_last; in_2_addr_op_is_last <= in_2_addr_op_next == word_index_last; dummy_addr_op_is_last <= dummy_addr_op_next == word_index_last; @@ -757,7 +757,7 @@ module modexpng_io_manager // always @(posedge clk or negedge rst_n) // - if (!rst_n) io_fsm_state <= IO_FSM_STATE_IDLE_X; + if (!rst_n) io_fsm_state <= IO_FSM_STATE_IDLE; else io_fsm_state <= io_fsm_state_next; @@ -770,7 +770,7 @@ module modexpng_io_manager // io_fsm_done <= 1'b0; // - if (io_fsm_state == IO_FSM_STATE_BUSY1_X) begin + if (io_fsm_state == IO_FSM_STATE_BUSY1) begin // if (opcode_is_input) begin if (sel_aux_is_1 && in_1_addr_op_is_last) io_fsm_done <= 1'b1; @@ -787,26 +787,26 @@ module modexpng_io_manager // // FSM Transition Logic // - assign io_fsm_state_after_busy = opcode_is_input ? IO_FSM_STATE_EXTRA1_X : IO_FSM_STATE_LATENCY_POST1_X; + assign io_fsm_state_after_busy = opcode_is_input ? IO_FSM_STATE_EXTRA1 : IO_FSM_STATE_LATENCY_POST1; always @* begin // case (io_fsm_state) - IO_FSM_STATE_IDLE_X: io_fsm_state_next = ena ? IO_FSM_STATE_LATENCY_PRE1_X : IO_FSM_STATE_IDLE_X ; - IO_FSM_STATE_LATENCY_PRE1_X: io_fsm_state_next = IO_FSM_STATE_LATENCY_PRE2_X ; - IO_FSM_STATE_LATENCY_PRE2_X: io_fsm_state_next = IO_FSM_STATE_LATENCY_PRE3_X ; - IO_FSM_STATE_LATENCY_PRE3_X: io_fsm_state_next = IO_FSM_STATE_LATENCY_PRE4_X ; - IO_FSM_STATE_LATENCY_PRE4_X: io_fsm_state_next = IO_FSM_STATE_BUSY1_X ; - IO_FSM_STATE_BUSY1_X: io_fsm_state_next = IO_FSM_STATE_BUSY2_X ; - IO_FSM_STATE_BUSY2_X: io_fsm_state_next = io_fsm_done ? io_fsm_state_after_busy : IO_FSM_STATE_BUSY1_X; - IO_FSM_STATE_EXTRA1_X: io_fsm_state_next = IO_FSM_STATE_EXTRA2_X ; - IO_FSM_STATE_EXTRA2_X: io_fsm_state_next = IO_FSM_STATE_LATENCY_POST1_X ; - IO_FSM_STATE_LATENCY_POST1_X: io_fsm_state_next = IO_FSM_STATE_LATENCY_POST2_X ; - IO_FSM_STATE_LATENCY_POST2_X: io_fsm_state_next = IO_FSM_STATE_LATENCY_POST3_X ; - IO_FSM_STATE_LATENCY_POST3_X: io_fsm_state_next = IO_FSM_STATE_LATENCY_POST4_X ; - IO_FSM_STATE_LATENCY_POST4_X: io_fsm_state_next = IO_FSM_STATE_STOP_X ; - IO_FSM_STATE_STOP_X: io_fsm_state_next = IO_FSM_STATE_IDLE_X ; - default: io_fsm_state_next = IO_FSM_STATE_IDLE_X ; + IO_FSM_STATE_IDLE: io_fsm_state_next = ena ? IO_FSM_STATE_LATENCY_PRE1 : IO_FSM_STATE_IDLE ; + IO_FSM_STATE_LATENCY_PRE1: io_fsm_state_next = IO_FSM_STATE_LATENCY_PRE2 ; + IO_FSM_STATE_LATENCY_PRE2: io_fsm_state_next = IO_FSM_STATE_LATENCY_PRE3 ; + IO_FSM_STATE_LATENCY_PRE3: io_fsm_state_next = IO_FSM_STATE_LATENCY_PRE4 ; + IO_FSM_STATE_LATENCY_PRE4: io_fsm_state_next = IO_FSM_STATE_BUSY1 ; + IO_FSM_STATE_BUSY1: io_fsm_state_next = IO_FSM_STATE_BUSY2 ; + IO_FSM_STATE_BUSY2: io_fsm_state_next = io_fsm_done ? io_fsm_state_after_busy : IO_FSM_STATE_BUSY1; + IO_FSM_STATE_EXTRA1: io_fsm_state_next = IO_FSM_STATE_EXTRA2 ; + IO_FSM_STATE_EXTRA2: io_fsm_state_next = IO_FSM_STATE_LATENCY_POST1 ; + IO_FSM_STATE_LATENCY_POST1: io_fsm_state_next = IO_FSM_STATE_LATENCY_POST2 ; + IO_FSM_STATE_LATENCY_POST2: io_fsm_state_next = IO_FSM_STATE_LATENCY_POST3 ; + IO_FSM_STATE_LATENCY_POST3: io_fsm_state_next = IO_FSM_STATE_LATENCY_POST4 ; + IO_FSM_STATE_LATENCY_POST4: io_fsm_state_next = IO_FSM_STATE_STOP ; + IO_FSM_STATE_STOP: io_fsm_state_next = IO_FSM_STATE_IDLE ; + default: io_fsm_state_next = IO_FSM_STATE_IDLE ; endcase // end @@ -823,8 +823,8 @@ module modexpng_io_manager // if (!rst_n) rdy_reg <= 1'b1; else case (io_fsm_state) - IO_FSM_STATE_IDLE_X: rdy_reg <= ~ena; - IO_FSM_STATE_STOP_X: rdy_reg <= 1'b1; + IO_FSM_STATE_IDLE: rdy_reg <= ~ena; + IO_FSM_STATE_STOP: rdy_reg <= 1'b1; endcase diff --git a/rtl/modexpng_io_manager_debug.vh b/rtl/modexpng_io_manager_debug.vh index 593005b..e94ec67 100644 --- a/rtl/modexpng_io_manager_debug.vh +++ b/rtl/modexpng_io_manager_debug.vh @@ -32,7 +32,7 @@ always @(posedge clk) // - if (io_fsm_state == IO_FSM_STATE_STOP_X) begin + if (io_fsm_state == IO_FSM_STATE_STOP) begin if (opcode_is_ladder_init) begin $display("[step] | D | P | Q"); $display("-------+---+---+---"); |