diff options
Diffstat (limited to 'rtl/modexpng_general_worker.v')
| -rw-r--r-- | rtl/modexpng_general_worker.v | 55 |
1 files changed, 52 insertions, 3 deletions
diff --git a/rtl/modexpng_general_worker.v b/rtl/modexpng_general_worker.v index 74c939b..d82a120 100644 --- a/rtl/modexpng_general_worker.v +++ b/rtl/modexpng_general_worker.v @@ -334,6 +334,10 @@ module modexpng_general_worker // end // + UOP_OPCODE_MERGE_LH: + // + enable_wide_xy_rd_en; + // endcase // endcase @@ -424,7 +428,8 @@ module modexpng_general_worker // case (opcode) // - UOP_OPCODE_PROPAGATE_CARRIES: + UOP_OPCODE_PROPAGATE_CARRIES, + UOP_OPCODE_MERGE_LH: // enable_narrow_xy_wr_en; // @@ -738,6 +743,13 @@ module modexpng_general_worker wrk_rd_narrow_x_din_y, wrk_rd_narrow_y_din_y); // + UOP_OPCODE_MERGE_LH: + // + update_narrow_dout(wrk_rd_wide_x_din_x, + wrk_rd_wide_y_din_x, + wrk_rd_wide_x_din_y, + wrk_rd_wide_y_din_y); + // endcase // endcase @@ -819,6 +831,8 @@ module modexpng_general_worker reg [OP_ADDR_W -1:0] rd_wide_xy_addr_xy_next; reg [OP_ADDR_W -1:0] rd_narrow_xy_addr_xy_next; + reg rd_wide_xy_addr_xy_next_last_seen; + wire rd_wide_xy_addr_xy_next_is_last = rd_wide_xy_addr_xy_next == word_index_last_half; wire rd_narrow_xy_addr_xy_next_is_last = rd_narrow_xy_addr_xy_next == word_index_last; @@ -874,6 +888,22 @@ module modexpng_general_worker rd_narrow_xy_addr_xy_next <= !rd_narrow_xy_addr_xy_next_is_last ? rd_narrow_xy_addr_xy_next + 1'b1 : OP_ADDR_ZERO; endtask + always @(posedge clk) + // + case (wrk_fsm_state_next_one_pass) + // + WRK_FSM_STATE_LATENCY_PRE1: + // + rd_wide_xy_addr_xy_next_last_seen <= 1'b0; + // + WRK_FSM_STATE_LATENCY_PRE2, + WRK_FSM_STATE_BUSY: + // + if (!rd_wide_xy_addr_xy_next_last_seen) + rd_wide_xy_addr_xy_next_last_seen <= rd_wide_xy_addr_xy_next_is_last; + // + endcase + always @(posedge clk) begin // update_rd_wide_bank_addr (BANK_DNC, OP_ADDR_DNC); @@ -897,6 +927,11 @@ module modexpng_general_worker // end // + UOP_OPCODE_MERGE_LH: begin + update_rd_wide_bank_addr (BANK_WIDE_L, OP_ADDR_ZERO); update_rd_wide_addr_next (OP_ADDR_ONE); + update_rd_narrow_bank_addr(sel_narrow_in, OP_ADDR_ZERO); update_rd_narrow_addr_next(OP_ADDR_ONE); + end + // endcase // WRK_FSM_STATE_LATENCY_PRE2, @@ -920,6 +955,15 @@ module modexpng_general_worker // end // + UOP_OPCODE_MERGE_LH: begin + // + if (!rd_wide_xy_addr_xy_next_last_seen) update_rd_wide_bank_addr (BANK_WIDE_L, rd_wide_xy_addr_xy_next ); + else update_rd_wide_bank_addr (BANK_WIDE_H, rd_wide_xy_addr_xy_next ); + advance_rd_wide_addr_next ; + update_rd_narrow_bank_addr(sel_narrow_in, rd_narrow_xy_addr_xy_next); advance_rd_narrow_addr_next; + // + end + // endcase // endcase @@ -1060,6 +1104,9 @@ module modexpng_general_worker UOP_OPCODE_MODULAR_REDUCE_INIT: update_wr_wide_bank_addr(uop_modular_reduce_init_bank_x, uop_modular_reduce_init_bank_y, rd_wide_xy_addr_x_dly2, rd_wide_xy_addr_y_dly2); // + UOP_OPCODE_MERGE_LH: + update_wr_narrow_bank_addr(sel_narrow_out, sel_narrow_out, rd_narrow_xy_addr_x_dly2, rd_narrow_xy_addr_y_dly2); + // endcase // endcase @@ -1121,7 +1168,8 @@ module modexpng_general_worker UOP_OPCODE_PROPAGATE_CARRIES, UOP_OPCODE_OUTPUT_FROM_NARROW, UOP_OPCODE_COPY_CRT_Y2X, - UOP_OPCODE_MODULAR_REDUCE_INIT: wrk_fsm_state <= wrk_fsm_state_next_one_pass; + UOP_OPCODE_MODULAR_REDUCE_INIT, + UOP_OPCODE_MERGE_LH: wrk_fsm_state <= wrk_fsm_state_next_one_pass; UOP_OPCODE_COPY_LADDERS_X2Y, UOP_OPCODE_CROSS_LADDERS_X2Y: wrk_fsm_state <= wrk_fsm_state_next_one_pass_meander; UOP_OPCODE_MODULAR_SUBTRACT: wrk_fsm_state <= wrk_fsm_state_next_two_pass; @@ -1148,7 +1196,8 @@ module modexpng_general_worker UOP_OPCODE_PROPAGATE_CARRIES, UOP_OPCODE_OUTPUT_FROM_NARROW, UOP_OPCODE_COPY_CRT_Y2X, - UOP_OPCODE_MODULAR_REDUCE_INIT: + UOP_OPCODE_MODULAR_REDUCE_INIT, + UOP_OPCODE_MERGE_LH: // case (wrk_fsm_state) WRK_FSM_STATE_BUSY: |