diff options
Diffstat (limited to 'rtl/dsp')
| -rw-r--r-- | rtl/dsp/dsp_array.v | 42 |
1 files changed, 37 insertions, 5 deletions
diff --git a/rtl/dsp/dsp_array.v b/rtl/dsp/dsp_array.v index 178f87f..2a050d4 100644 --- a/rtl/dsp/dsp_array.v +++ b/rtl/dsp/dsp_array.v @@ -8,11 +8,11 @@ module dsp_array input ce_p, input ce_mode, - input [8 -1:0] mode_z, + input [9 -1:0] mode_z, - input [4*18-1:0] a, + input [5*18-1:0] a, input [1*17-1:0] b, - output [8*47-1:0] p + output [9*47-1:0] p ); `include "../modexpng_parameters_x8.vh" @@ -37,7 +37,7 @@ module dsp_array genvar z; generate for (z=0; z<(NUM_MULTS/2); z=z+1) // - begin : DSP48E1 + begin : gen_DSP48E1 // dsp_slice # ( @@ -64,7 +64,7 @@ module dsp_array .opmode ({1'b0, mode_z[2*z], 1'b0, 2'b01, 2'b01}), .alumode (4'b0000), - .casc_a_in ({17{1'b0}}), + .casc_a_in ({18{1'b0}}), .casc_b_in ({17{1'b0}}), .casc_a_out (casc_a[z]), @@ -107,5 +107,37 @@ module dsp_array // endgenerate + dsp_slice # + ( + .AB_INPUT("DIRECT"), + .B_REG(2) + ) + dsp_aux + ( + .clk (clk), + + .ce_a1 (ce_a0), + .ce_b1 (ce_b0), + .ce_a2 (ce_a1), + .ce_b2 (ce_b1), + .ce_m (ce_m), + .ce_p (ce_p), + .ce_mode (ce_mode), + + .a (a[4*18+:18]), + .b (b), + .p (p[47*2*4+:47]), + + .inmode (5'b00000), + .opmode ({1'b0, mode_z[2*4], 1'b0, 2'b01, 2'b01}), + .alumode (4'b0000), + + .casc_a_in ({18{1'b0}}), + .casc_b_in ({17{1'b0}}), + + .casc_a_out (), + .casc_b_out () + ); + endmodule |