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authorPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2019-10-21 12:56:30 +0300
committerPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2019-10-21 12:56:30 +0300
commit9eac252242c69e51a38a9a88c87b564dd40b6257 (patch)
treeab6653950a7f2a811598c73f15116fa5c009ec5c /rtl/modexpng_storage_block.v
parent36339014ec3d3ad3bb4622392d5075d674e7dbeb (diff)
Entire CRT signature algorithm works by now.
Moved micro-operations handler into a separate module file, this way we don't have any synthesized stuff in the top-level module, just instantiations. This is more consistent from the design partitioning point of view. Btw, Xilinx claims their tools work better that way too, but who knows... Added optional simulation-only code to assist debugging. Un-comment the ENABLE_DEBUG `define in 'rtl/modexpng_parameters.vh' to use, but don't ever try to synthesize the core with debugging enabled.
Diffstat (limited to 'rtl/modexpng_storage_block.v')
-rw-r--r--rtl/modexpng_storage_block.v21
1 files changed, 11 insertions, 10 deletions
diff --git a/rtl/modexpng_storage_block.v b/rtl/modexpng_storage_block.v
index 19601ef..5a03b24 100644
--- a/rtl/modexpng_storage_block.v
+++ b/rtl/modexpng_storage_block.v
@@ -48,6 +48,7 @@ module modexpng_storage_block
// Headers
//
`include "modexpng_parameters.vh"
+ `include "modexpng_storage_primitives.vh"
//
@@ -150,7 +151,7 @@ module modexpng_storage_block
//
assign rd_wide_xy_offset[z] = {1'b0, rd_wide_xy_bank, rd_wide_xy_addr[z*OP_ADDR_W +: OP_ADDR_W]};
//
- modexpng_sdp_36k_x18_wrapper wide_x
+ `MODEXPNG_SDP_36K_X18 wide_x
(
.clk (clk),
@@ -165,7 +166,7 @@ module modexpng_storage_block
.doutb (rd_wide_x_dout[z*WORD_EXT_W +: WORD_EXT_W])
);
//
- modexpng_sdp_36k_x18_wrapper wide_y
+ `MODEXPNG_SDP_36K_X18 wide_y
(
.clk (clk),
@@ -186,7 +187,7 @@ module modexpng_storage_block
//
// Worker "Wide" Storage
//
- modexpng_sdp_36k_x18_wrapper wrk_wide_x
+ `MODEXPNG_SDP_36K_X18 wrk_wide_x
(
.clk (clk),
@@ -201,7 +202,7 @@ module modexpng_storage_block
.doutb (wrk_wide_x_dout)
);
//
- modexpng_sdp_36k_x18_wrapper wrk_wide_y
+ `MODEXPNG_SDP_36K_X18 wrk_wide_y
(
.clk (clk),
@@ -219,7 +220,7 @@ module modexpng_storage_block
//
// Auxilary "Wide" Storage
//
- modexpng_sdp_36k_x18_wrapper wide_x_aux
+ `MODEXPNG_SDP_36K_X18 wide_x_aux
(
.clk (clk),
@@ -234,7 +235,7 @@ module modexpng_storage_block
.doutb (rd_wide_x_dout_aux)
);
//
- modexpng_sdp_36k_x18_wrapper wide_y_aux
+ `MODEXPNG_SDP_36K_X18 wide_y_aux
(
.clk (clk),
@@ -252,7 +253,7 @@ module modexpng_storage_block
//
// "Narrow" Storage
//
- modexpng_sdp_36k_x18_wrapper narrow_x
+ `MODEXPNG_SDP_36K_X18 narrow_x
(
.clk (clk),
@@ -267,7 +268,7 @@ module modexpng_storage_block
.doutb (rd_narrow_x_dout)
);
- modexpng_sdp_36k_x18_wrapper narrow_y
+ `MODEXPNG_SDP_36K_X18 narrow_y
(
.clk (clk),
@@ -285,7 +286,7 @@ module modexpng_storage_block
//
// Worker "Narrow" Storage
//
- modexpng_sdp_36k_x18_wrapper wrk_narrow_x
+ `MODEXPNG_SDP_36K_X18 wrk_narrow_x
(
.clk (clk),
@@ -300,7 +301,7 @@ module modexpng_storage_block
.doutb (wrk_narrow_x_dout)
);
- modexpng_sdp_36k_x18_wrapper wrk_narrow_y
+ `MODEXPNG_SDP_36K_X18 wrk_narrow_y
(
.clk (clk),