aboutsummaryrefslogtreecommitdiff
path: root/rtl/modexpng_mmm_dual.v
diff options
context:
space:
mode:
authorPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2019-10-21 15:13:01 +0300
committerPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2019-10-21 15:13:01 +0300
commit584393ac5fc9bbe80887702ec2fc97bee999c5e7 (patch)
treeffda0852ba561ca13ee07ef6147225a38d809151 /rtl/modexpng_mmm_dual.v
parent69b5d9f65cf49adbc1c1850fa2c4757199008717 (diff)
Further work:
- added core wrapper - fixed module resets across entire core (all the resets are now consistently active-low) - continued refactoring
Diffstat (limited to 'rtl/modexpng_mmm_dual.v')
-rw-r--r--rtl/modexpng_mmm_dual.v496
1 files changed, 247 insertions, 249 deletions
diff --git a/rtl/modexpng_mmm_dual.v b/rtl/modexpng_mmm_dual.v
index 13a8773..a868362 100644
--- a/rtl/modexpng_mmm_dual.v
+++ b/rtl/modexpng_mmm_dual.v
@@ -1,6 +1,6 @@
module modexpng_mmm_dual
(
- clk, rst,
+ clk, rst_n,
ena, rdy,
@@ -56,16 +56,14 @@ module modexpng_mmm_dual
// Headers
//
`include "modexpng_parameters.vh"
- `include "../rtl_1/modexpng_mmm_fsm_old.vh"
- //`include "../rtl_1/modexpng_parameters_old.vh"
- //`include "../rtl_1/modexpng_parameters_x8_old.vh"
+ `include "modexpng_mmm_dual_fsm.vh"
//
// Ports
//
input clk;
- input rst;
+ input rst_n;
input ena;
output rdy;
@@ -122,23 +120,23 @@ module modexpng_mmm_dual
//
// FSM Declaration
//
- reg [FSM_STATE_WIDTH-1:0] fsm_state = FSM_STATE_IDLE;
- reg [FSM_STATE_WIDTH-1:0] fsm_state_next;
+ reg [MMM_FSM_STATE_W-1:0] fsm_state = MMM_FSM_STATE_IDLE;
+ reg [MMM_FSM_STATE_W-1:0] fsm_state_next;
- wire [FSM_STATE_WIDTH-1:0] fsm_state_after_idle;
- wire [FSM_STATE_WIDTH-1:0] fsm_state_after_mult_square;
- wire [FSM_STATE_WIDTH-1:0] fsm_state_after_mult_triangle;
- wire [FSM_STATE_WIDTH-1:0] fsm_state_after_mult_rectangle;
- wire [FSM_STATE_WIDTH-1:0] fsm_state_after_square_holdoff;
+ wire [MMM_FSM_STATE_W-1:0] fsm_state_after_idle;
+ wire [MMM_FSM_STATE_W-1:0] fsm_state_after_mult_square;
+ wire [MMM_FSM_STATE_W-1:0] fsm_state_after_mult_triangle;
+ wire [MMM_FSM_STATE_W-1:0] fsm_state_after_mult_rectangle;
+ wire [MMM_FSM_STATE_W-1:0] fsm_state_after_square_holdoff;
//
// FSM Process
//
- always @(posedge clk)
+ always @(posedge clk or negedge rst_n)
//
- if (rst) fsm_state <= FSM_STATE_IDLE;
- else fsm_state <= fsm_state_next;
+ if (!rst_n) fsm_state <= MMM_FSM_STATE_IDLE;
+ else fsm_state <= fsm_state_next;
//
@@ -193,9 +191,9 @@ module modexpng_mmm_dual
//
case (fsm_state_next)
//
- FSM_STATE_MULT_SQUARE_COL_0_INIT,
- FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
- FSM_STATE_MULT_RECTANGLE_COL_0_INIT: begin
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_INIT: begin
col_index <= 5'd0;
col_index_last <= word_index_last[7:3];
col_index_next <= 5'd1;
@@ -203,9 +201,9 @@ module modexpng_mmm_dual
end
//
- FSM_STATE_MULT_SQUARE_COL_N_INIT,
- FSM_STATE_MULT_TRIANGLE_COL_N_INIT,
- FSM_STATE_MULT_RECTANGLE_COL_N_INIT: begin
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_INIT: begin
col_index <= col_index_next;
col_is_last <= col_index_next == col_index_last;
col_index_next <= col_index_next == col_index_last ? 5'd0 : col_index_next + 5'd1;
@@ -242,8 +240,8 @@ module modexpng_mmm_dual
//
case (fsm_state)
//
- FSM_STATE_MULT_SQUARE_COL_0_BUSY,
- FSM_STATE_MULT_SQUARE_COL_N_BUSY:
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_BUSY:
square_almost_done_flop <= square_almost_done_comb;
//
default:
@@ -262,8 +260,8 @@ module modexpng_mmm_dual
//
case (fsm_state)
//
- FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
- FSM_STATE_MULT_TRIANGLE_COL_N_BUSY:
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_BUSY:
triangle_almost_done_flop <= triangle_almost_done_comb;
//
default:
@@ -283,8 +281,8 @@ module modexpng_mmm_dual
//
case (fsm_state)
//
- FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
- FSM_STATE_MULT_RECTANGLE_COL_N_BUSY:
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_BUSY:
rectangle_almost_done_flop <= rectangle_almost_done_comb;
//
default:
@@ -301,36 +299,36 @@ module modexpng_mmm_dual
//
// Narrow Storage Control Logic
//
- always @(posedge clk)
+ always @(posedge clk or negedge rst_n)
//
- if (rst) narrow_xy_ena <= 1'b0;
+ if (!rst_n) narrow_xy_ena <= 1'b0;
else begin
//
// Narrow Address
//
case (fsm_state_next)
//
- FSM_STATE_MULT_SQUARE_COL_0_INIT,
- FSM_STATE_MULT_SQUARE_COL_N_INIT: narrow_xy_addr <= 8'd0;
- FSM_STATE_MULT_SQUARE_COL_0_TRIG,
- FSM_STATE_MULT_SQUARE_COL_N_TRIG,
- FSM_STATE_MULT_SQUARE_COL_0_BUSY,
- FSM_STATE_MULT_SQUARE_COL_N_BUSY: narrow_xy_addr <= !square_almost_done_flop ? narrow_xy_addr + 1'b1 : 8'd0;
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_INIT: narrow_xy_addr <= 8'd0;
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_BUSY: narrow_xy_addr <= !square_almost_done_flop ? narrow_xy_addr + 1'b1 : 8'd0;
//
- FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
- FSM_STATE_MULT_TRIANGLE_COL_N_INIT: narrow_xy_addr <= 8'd0;
- FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_N_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
- FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: narrow_xy_addr <= triangle_almost_done_flop || (col_is_last && triangle_surely_done_flop) ?
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_INIT: narrow_xy_addr <= 8'd0;
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: narrow_xy_addr <= triangle_almost_done_flop || (col_is_last && triangle_surely_done_flop) ?
8'd0 : narrow_xy_addr + 1'b1;
//
- FSM_STATE_MULT_RECTANGLE_COL_0_INIT,
- FSM_STATE_MULT_RECTANGLE_COL_N_INIT: narrow_xy_addr <= 8'd0;
- FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
- FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: narrow_xy_addr <= rectangle_almost_done_flop || rectangle_surely_done_flop ?
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_INIT: narrow_xy_addr <= 8'd0;
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: narrow_xy_addr <= rectangle_almost_done_flop || rectangle_surely_done_flop ?
8'd1 : narrow_xy_addr + 1'b1;
//
default: narrow_xy_addr <= 8'dX;
@@ -341,27 +339,27 @@ module modexpng_mmm_dual
//
case (fsm_state_next)
//
- FSM_STATE_MULT_SQUARE_COL_0_INIT,
- FSM_STATE_MULT_SQUARE_COL_N_INIT,
- FSM_STATE_MULT_SQUARE_COL_0_TRIG,
- FSM_STATE_MULT_SQUARE_COL_N_TRIG,
- FSM_STATE_MULT_SQUARE_COL_0_BUSY,
- FSM_STATE_MULT_SQUARE_COL_N_BUSY: narrow_xy_bank <= sel_narrow_in;
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_BUSY: narrow_xy_bank <= sel_narrow_in;
//
- FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
- FSM_STATE_MULT_TRIANGLE_COL_N_INIT,
- FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_N_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
- FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: narrow_xy_bank <= col_is_last && (triangle_almost_done_flop || triangle_surely_done_flop) ?
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: narrow_xy_bank <= col_is_last && (triangle_almost_done_flop || triangle_surely_done_flop) ?
BANK_NARROW_EXT : BANK_NARROW_COEFF;
//
- FSM_STATE_MULT_RECTANGLE_COL_0_INIT,
- FSM_STATE_MULT_RECTANGLE_COL_N_INIT,
- FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
- FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: narrow_xy_bank <= rectangle_almost_done_flop || rectangle_surely_done_flop ?
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: narrow_xy_bank <= rectangle_almost_done_flop || rectangle_surely_done_flop ?
BANK_NARROW_EXT : BANK_NARROW_Q;
//
default: narrow_xy_bank <= 2'bXX;
@@ -370,24 +368,24 @@ module modexpng_mmm_dual
//
case (fsm_state_next)
//
- FSM_STATE_MULT_SQUARE_COL_0_INIT,
- FSM_STATE_MULT_SQUARE_COL_N_INIT,
- FSM_STATE_MULT_SQUARE_COL_0_TRIG,
- FSM_STATE_MULT_SQUARE_COL_N_TRIG: narrow_xy_ena <= 1'b1;
- FSM_STATE_MULT_SQUARE_COL_0_BUSY,
- FSM_STATE_MULT_SQUARE_COL_N_BUSY: narrow_xy_ena <= ~square_almost_done_flop;
- FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
- FSM_STATE_MULT_TRIANGLE_COL_N_INIT,
- FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_N_TRIG: narrow_xy_ena <= 1'b1;
- FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
- FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: narrow_xy_ena <= !col_is_last ? ~triangle_almost_done_flop : ~triangle_surely_done_flop;
- FSM_STATE_MULT_RECTANGLE_COL_0_INIT,
- FSM_STATE_MULT_RECTANGLE_COL_N_INIT,
- FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_N_TRIG: narrow_xy_ena <= 1'b1;
- FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
- FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: narrow_xy_ena <= ~rectangle_surely_done_flop;
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_TRIG: narrow_xy_ena <= 1'b1;
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_BUSY: narrow_xy_ena <= ~square_almost_done_flop;
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_TRIG: narrow_xy_ena <= 1'b1;
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: narrow_xy_ena <= !col_is_last ? ~triangle_almost_done_flop : ~triangle_surely_done_flop;
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_TRIG: narrow_xy_ena <= 1'b1;
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: narrow_xy_ena <= ~rectangle_surely_done_flop;
//
default: narrow_xy_ena <= 1'b0;
//
@@ -420,9 +418,9 @@ module modexpng_mmm_dual
endfunction
integer j;
- always @(posedge clk)
+ always @(posedge clk or negedge rst_n)
//
- if (rst) begin
+ if (!rst_n) begin
wide_xy_ena <= 1'b0;
wide_xy_ena_aux <= 1'b0;
end else begin
@@ -435,26 +433,26 @@ module modexpng_mmm_dual
//
// this can be reworked by having 8 address regs instead of 4 and using shifts instead of subtractions!
//
- FSM_STATE_MULT_SQUARE_COL_0_INIT: wide_xy_addr[j] <= {5'd0, wide_offset_rom[j]};
- FSM_STATE_MULT_SQUARE_COL_N_INIT: wide_xy_addr[j] <= {col_index_next, wide_offset_rom[j]};
- FSM_STATE_MULT_SQUARE_COL_0_TRIG,
- FSM_STATE_MULT_SQUARE_COL_N_TRIG,
- FSM_STATE_MULT_SQUARE_COL_0_BUSY,
- FSM_STATE_MULT_SQUARE_COL_N_BUSY: wide_xy_addr[j] <= wide_xy_addr_next(wide_xy_addr[j], word_index_last);
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_INIT: wide_xy_addr[j] <= {5'd0, wide_offset_rom[j]};
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_INIT: wide_xy_addr[j] <= {col_index_next, wide_offset_rom[j]};
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_BUSY: wide_xy_addr[j] <= wide_xy_addr_next(wide_xy_addr[j], word_index_last);
//
- FSM_STATE_MULT_TRIANGLE_COL_0_INIT: wide_xy_addr[j] <= {5'd0, wide_offset_rom[j]};
- FSM_STATE_MULT_TRIANGLE_COL_N_INIT: wide_xy_addr[j] <= {col_index_next, wide_offset_rom[j]};
- FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_N_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
- FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: wide_xy_addr[j] <= wide_xy_addr_next(wide_xy_addr[j], word_index_last);
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_INIT: wide_xy_addr[j] <= {5'd0, wide_offset_rom[j]};
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_INIT: wide_xy_addr[j] <= {col_index_next, wide_offset_rom[j]};
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: wide_xy_addr[j] <= wide_xy_addr_next(wide_xy_addr[j], word_index_last);
//
- FSM_STATE_MULT_RECTANGLE_COL_0_INIT: wide_xy_addr[j] <= {5'd0, wide_offset_rom[j]};
- FSM_STATE_MULT_RECTANGLE_COL_N_INIT: wide_xy_addr[j] <= {col_index_next, wide_offset_rom[j]};
- FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
- FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: wide_xy_addr[j] <= wide_xy_addr_next(wide_xy_addr[j], word_index_last);
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_INIT: wide_xy_addr[j] <= {5'd0, wide_offset_rom[j]};
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_INIT: wide_xy_addr[j] <= {col_index_next, wide_offset_rom[j]};
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: wide_xy_addr[j] <= wide_xy_addr_next(wide_xy_addr[j], word_index_last);
//
default: wide_xy_addr[j] <= 8'dX;
endcase
@@ -465,27 +463,27 @@ module modexpng_mmm_dual
//
// this can be reworked by having 8 address regs instead of 4 and using shifts instead of subtractions!
//
- FSM_STATE_MULT_SQUARE_COL_0_INIT: wide_xy_addr_aux <= {5'd0, 3'd1};
- FSM_STATE_MULT_SQUARE_COL_N_INIT: wide_xy_addr_aux <= {5'd0, 3'd1};
- FSM_STATE_MULT_SQUARE_COL_0_TRIG,
- FSM_STATE_MULT_SQUARE_COL_N_TRIG,
- FSM_STATE_MULT_SQUARE_COL_0_BUSY,
- FSM_STATE_MULT_SQUARE_COL_N_BUSY: wide_xy_addr_aux <= wide_xy_addr_next(wide_xy_addr_aux, word_index_last);
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_INIT: wide_xy_addr_aux <= {5'd0, 3'd1};
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_INIT: wide_xy_addr_aux <= {5'd0, 3'd1};
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_BUSY: wide_xy_addr_aux <= wide_xy_addr_next(wide_xy_addr_aux, word_index_last);
//
- FSM_STATE_MULT_TRIANGLE_COL_0_INIT: wide_xy_addr_aux <= {5'd0, 3'd1};
- FSM_STATE_MULT_TRIANGLE_COL_N_INIT: wide_xy_addr_aux <= {5'd0, 3'd1};
- FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_N_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
- FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: wide_xy_addr_aux <= wide_xy_addr_next(wide_xy_addr_aux, word_index_last);
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_INIT: wide_xy_addr_aux <= {5'd0, 3'd1};
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_INIT: wide_xy_addr_aux <= {5'd0, 3'd1};
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: wide_xy_addr_aux <= wide_xy_addr_next(wide_xy_addr_aux, word_index_last);
//
- FSM_STATE_MULT_RECTANGLE_COL_0_INIT: wide_xy_addr_aux <= 8'dX;//{5'd0, 3'd0};
- FSM_STATE_MULT_RECTANGLE_COL_N_INIT,
- FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
- FSM_STATE_MULT_RECTANGLE_COL_N_BUSY,
- FSM_STATE_MULT_RECTANGLE_HOLDOFF: wide_xy_addr_aux <= rcmb_xy_valid ? rcmb_xy_addr : 8'dX;
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_INIT: wide_xy_addr_aux <= 8'dX;//{5'd0, 3'd0};
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_BUSY,
+ MMM_FSM_STATE_MULT_RECTANGLE_HOLDOFF: wide_xy_addr_aux <= rcmb_xy_valid ? rcmb_xy_addr : 8'dX;
//recomb_fat_bram_xy_dout_valid && (recomb_fat_bram_xy_bank == BANK_FAT_ML) ?
//mac_fat_bram_xy_addr[4] + 1'b1 : mac_fat_bram_xy_addr[4];
//
@@ -495,49 +493,49 @@ module modexpng_mmm_dual
// Wide Bank
//
case (fsm_state_next)
- FSM_STATE_MULT_SQUARE_COL_0_INIT,
- FSM_STATE_MULT_SQUARE_COL_N_INIT,
- FSM_STATE_MULT_SQUARE_COL_0_TRIG,
- FSM_STATE_MULT_SQUARE_COL_N_TRIG,
- FSM_STATE_MULT_SQUARE_COL_0_BUSY,
- FSM_STATE_MULT_SQUARE_COL_N_BUSY: wide_xy_bank <= sel_wide_in;
- FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
- FSM_STATE_MULT_TRIANGLE_COL_N_INIT,
- FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_N_TRIG: wide_xy_bank <= BANK_WIDE_L;
- FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
- FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: wide_xy_bank <= BANK_WIDE_L;
- FSM_STATE_MULT_RECTANGLE_COL_0_INIT,
- FSM_STATE_MULT_RECTANGLE_COL_N_INIT,
- FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
- FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: wide_xy_bank <= BANK_WIDE_N;
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_BUSY: wide_xy_bank <= sel_wide_in;
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_TRIG: wide_xy_bank <= BANK_WIDE_L;
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: wide_xy_bank <= BANK_WIDE_L;
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: wide_xy_bank <= BANK_WIDE_N;
default: wide_xy_bank <= 3'bXXX;
endcase
//
// Wide Aux Bank
//
case (fsm_state_next)
- FSM_STATE_MULT_SQUARE_COL_0_INIT,
- FSM_STATE_MULT_SQUARE_COL_N_INIT,
- FSM_STATE_MULT_SQUARE_COL_0_TRIG,
- FSM_STATE_MULT_SQUARE_COL_N_TRIG,
- FSM_STATE_MULT_SQUARE_COL_0_BUSY,
- FSM_STATE_MULT_SQUARE_COL_N_BUSY: wide_xy_bank_aux <= sel_wide_in;
- FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
- FSM_STATE_MULT_TRIANGLE_COL_N_INIT,
- FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_N_TRIG: wide_xy_bank_aux <= BANK_WIDE_H;
- FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
- FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: wide_xy_bank_aux <= BANK_WIDE_L;
- FSM_STATE_MULT_RECTANGLE_COL_0_INIT,
- FSM_STATE_MULT_RECTANGLE_COL_N_INIT,
- FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
- FSM_STATE_MULT_RECTANGLE_COL_N_BUSY,
- FSM_STATE_MULT_RECTANGLE_HOLDOFF: if (rcmb_xy_valid) // rewrite using "Kolya-style" here (get rid of too many xxx's)
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_BUSY: wide_xy_bank_aux <= sel_wide_in;
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_TRIG: wide_xy_bank_aux <= BANK_WIDE_H;
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: wide_xy_bank_aux <= BANK_WIDE_L;
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_BUSY,
+ MMM_FSM_STATE_MULT_RECTANGLE_HOLDOFF: if (rcmb_xy_valid) // rewrite using "Kolya-style" here (get rid of too many xxx's)
case (rcmb_xy_bank)
BANK_RCMB_ML: wide_xy_bank_aux <= BANK_WIDE_L;
BANK_RCMB_MH: wide_xy_bank_aux <= BANK_WIDE_H;
@@ -551,43 +549,43 @@ module modexpng_mmm_dual
// Wide Enable
//
case (fsm_state_next)
- FSM_STATE_MULT_SQUARE_COL_0_INIT,
- FSM_STATE_MULT_SQUARE_COL_N_INIT,
- FSM_STATE_MULT_SQUARE_COL_0_TRIG,
- FSM_STATE_MULT_SQUARE_COL_N_TRIG,
- FSM_STATE_MULT_SQUARE_COL_0_BUSY,
- FSM_STATE_MULT_SQUARE_COL_N_BUSY,
- FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
- FSM_STATE_MULT_TRIANGLE_COL_N_INIT,
- FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_N_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
- FSM_STATE_MULT_TRIANGLE_COL_N_BUSY,
- FSM_STATE_MULT_RECTANGLE_COL_0_INIT,
- FSM_STATE_MULT_RECTANGLE_COL_N_INIT,
- FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
- FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: wide_xy_ena <= 1'b1;
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_BUSY,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_BUSY,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: wide_xy_ena <= 1'b1;
default: wide_xy_ena <= 1'b0;
endcase
//
// Wide Aux Enable
//
case (fsm_state_next)
- FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
- FSM_STATE_MULT_TRIANGLE_COL_N_INIT,
- FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_N_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
- FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: wide_xy_ena_aux <= 1'b1;
- FSM_STATE_MULT_RECTANGLE_COL_0_INIT: wide_xy_ena_aux <= 1'b0;//1'b1;
- FSM_STATE_MULT_RECTANGLE_COL_N_INIT,
- FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
- FSM_STATE_MULT_RECTANGLE_COL_N_BUSY,
- FSM_STATE_MULT_RECTANGLE_HOLDOFF: wide_xy_ena_aux <= rcmb_xy_valid;// && (recomb_fat_bram_xy_bank == BANK_FAT_ML);
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_INIT,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: wide_xy_ena_aux <= 1'b1;
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_INIT: wide_xy_ena_aux <= 1'b0;//1'b1;
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_INIT,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_BUSY,
+ MMM_FSM_STATE_MULT_RECTANGLE_HOLDOFF: wide_xy_ena_aux <= rcmb_xy_valid;// && (recomb_fat_bram_xy_bank == BANK_FAT_ML);
default: wide_xy_ena_aux <= 1'b0;
endcase
//
@@ -686,9 +684,9 @@ module modexpng_mmm_dual
reg narrow_xy_ena_dly1 = 1'b0;
reg narrow_xy_ena_dly2 = 1'b0;
- always @(posedge clk)
+ always @(posedge clk or negedge rst_n)
//
- if (rst) begin
+ if (!rst_n) begin
//
narrow_xy_ena_dly1 <= 1'b0;
narrow_xy_ena_dly2 <= 1'b0;
@@ -721,13 +719,13 @@ module modexpng_mmm_dual
always @(posedge clk) begin
//
case (fsm_state)
- FSM_STATE_MULT_SQUARE_COL_0_TRIG: dsp_merge_xy_b <= 1'b1;
- FSM_STATE_MULT_TRIANGLE_COL_0_TRIG: dsp_merge_xy_b <= 1'b0;
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_TRIG: dsp_merge_xy_b <= 1'b1;
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_TRIG: dsp_merge_xy_b <= 1'b0;
endcase
//
case (fsm_state)
- FSM_STATE_MULT_SQUARE_COL_0_TRIG,
- FSM_STATE_MULT_SQUARE_COL_N_TRIG: dsp_merge_xy_b_first <= 1'b1;
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_TRIG: dsp_merge_xy_b_first <= 1'b1;
default: dsp_merge_xy_b_first <= 1'b0;
endcase
//
@@ -815,18 +813,18 @@ module modexpng_mmm_dual
always @(posedge clk)
//
case (fsm_state_next)
- FSM_STATE_MULT_SQUARE_COL_0_TRIG,
- FSM_STATE_MULT_SQUARE_COL_N_TRIG: dsp_xy_mode_z_adv4 <= {9{1'b0}};
- FSM_STATE_MULT_SQUARE_COL_0_BUSY,
- FSM_STATE_MULT_SQUARE_COL_N_BUSY: dsp_xy_mode_z_adv4 <= calc_mac_mode_z_square(col_index_prev, narrow_xy_addr_dly);
- FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
- FSM_STATE_MULT_TRIANGLE_COL_N_TRIG: dsp_xy_mode_z_adv4 <= {9{1'b0}}; // so easy
- FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
- FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: dsp_xy_mode_z_adv4 <= {9{1'b1}};
- FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
- FSM_STATE_MULT_RECTANGLE_COL_N_TRIG: dsp_xy_mode_z_adv4 <= {9{1'b0}}; // so easy
- FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
- FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: dsp_xy_mode_z_adv4 <= calc_mac_mode_z_rectangle(col_index_prev, narrow_xy_addr_dly);
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_TRIG: dsp_xy_mode_z_adv4 <= {9{1'b0}};
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_BUSY: dsp_xy_mode_z_adv4 <= calc_mac_mode_z_square(col_index_prev, narrow_xy_addr_dly);
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_TRIG: dsp_xy_mode_z_adv4 <= {9{1'b0}}; // so easy
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: dsp_xy_mode_z_adv4 <= {9{1'b1}};
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_TRIG: dsp_xy_mode_z_adv4 <= {9{1'b0}}; // so easy
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: dsp_xy_mode_z_adv4 <= calc_mac_mode_z_rectangle(col_index_prev, narrow_xy_addr_dly);
default: dsp_xy_mode_z_adv4 <= {9{1'b1}};
endcase
@@ -851,7 +849,7 @@ module modexpng_mmm_dual
modexpng_recombinator_block recombinator_block
(
.clk (clk),
- .rst (rst),
+ .rst_n (rst_n),
.ena (rcmb_ena),
.rdy (rcmb_rdy),
@@ -894,10 +892,10 @@ module modexpng_mmm_dual
//
// Recombinator Enable Logic
//
- always @(posedge clk)
+ always @(posedge clk or negedge rst_n)
//
- if (rst) rcmb_ena <= 1'b0;
- else rcmb_ena <= dsp_xy_ce_a && !dsp_xy_ce_b && !dsp_xy_ce_m && !dsp_xy_ce_p;
+ if (!rst_n) rcmb_ena <= 1'b0;
+ else rcmb_ena <= dsp_xy_ce_a && !dsp_xy_ce_b && !dsp_xy_ce_m && !dsp_xy_ce_p;
//
@@ -911,55 +909,55 @@ module modexpng_mmm_dual
//
// FSM Transition Logic
//
- assign fsm_state_after_idle = !only_reduce ? FSM_STATE_MULT_SQUARE_COL_0_INIT : FSM_STATE_MULT_TRIANGLE_COL_0_INIT;
- assign fsm_state_after_mult_square = col_is_last ? FSM_STATE_MULT_SQUARE_HOLDOFF : FSM_STATE_MULT_SQUARE_COL_N_INIT;
- assign fsm_state_after_mult_triangle = col_is_last ? FSM_STATE_MULT_TRIANGLE_HOLDOFF : FSM_STATE_MULT_TRIANGLE_COL_N_INIT;
- assign fsm_state_after_mult_rectangle = col_is_last ? FSM_STATE_MULT_RECTANGLE_HOLDOFF : FSM_STATE_MULT_RECTANGLE_COL_N_INIT;
- assign fsm_state_after_square_holdoff = just_multiply ? FSM_STATE_STOP : FSM_STATE_MULT_TRIANGLE_COL_0_INIT;
+ assign fsm_state_after_idle = !only_reduce ? MMM_FSM_STATE_MULT_SQUARE_COL_0_INIT : MMM_FSM_STATE_MULT_TRIANGLE_COL_0_INIT;
+ assign fsm_state_after_mult_square = col_is_last ? MMM_FSM_STATE_MULT_SQUARE_HOLDOFF : MMM_FSM_STATE_MULT_SQUARE_COL_N_INIT;
+ assign fsm_state_after_mult_triangle = col_is_last ? MMM_FSM_STATE_MULT_TRIANGLE_HOLDOFF : MMM_FSM_STATE_MULT_TRIANGLE_COL_N_INIT;
+ assign fsm_state_after_mult_rectangle = col_is_last ? MMM_FSM_STATE_MULT_RECTANGLE_HOLDOFF : MMM_FSM_STATE_MULT_RECTANGLE_COL_N_INIT;
+ assign fsm_state_after_square_holdoff = just_multiply ? MMM_FSM_STATE_STOP : MMM_FSM_STATE_MULT_TRIANGLE_COL_0_INIT;
always @* begin
//
- fsm_state_next = FSM_STATE_IDLE;
+ fsm_state_next = MMM_FSM_STATE_IDLE;
//
case (fsm_state)
- FSM_STATE_IDLE: fsm_state_next = ena ? fsm_state_after_idle /*FSM_STATE_MULT_SQUARE_COL_0_INIT*/ : FSM_STATE_IDLE;
+ MMM_FSM_STATE_IDLE: fsm_state_next = ena ? fsm_state_after_idle /*MMM_FSM_STATE_MULT_SQUARE_COL_0_INIT*/ : MMM_FSM_STATE_IDLE;
- FSM_STATE_MULT_SQUARE_COL_0_INIT: fsm_state_next = FSM_STATE_MULT_SQUARE_COL_0_TRIG ;
- FSM_STATE_MULT_SQUARE_COL_0_TRIG: fsm_state_next = FSM_STATE_MULT_SQUARE_COL_0_BUSY ;
- FSM_STATE_MULT_SQUARE_COL_0_BUSY: fsm_state_next = square_done ? FSM_STATE_MULT_SQUARE_COL_N_INIT : FSM_STATE_MULT_SQUARE_COL_0_BUSY;
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_INIT: fsm_state_next = MMM_FSM_STATE_MULT_SQUARE_COL_0_TRIG ;
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_TRIG: fsm_state_next = MMM_FSM_STATE_MULT_SQUARE_COL_0_BUSY ;
+ MMM_FSM_STATE_MULT_SQUARE_COL_0_BUSY: fsm_state_next = square_done ? MMM_FSM_STATE_MULT_SQUARE_COL_N_INIT : MMM_FSM_STATE_MULT_SQUARE_COL_0_BUSY;
- FSM_STATE_MULT_SQUARE_COL_N_INIT: fsm_state_next = FSM_STATE_MULT_SQUARE_COL_N_TRIG ;
- FSM_STATE_MULT_SQUARE_COL_N_TRIG: fsm_state_next = FSM_STATE_MULT_SQUARE_COL_N_BUSY ;
- FSM_STATE_MULT_SQUARE_COL_N_BUSY: fsm_state_next = square_done ? fsm_state_after_mult_square : FSM_STATE_MULT_SQUARE_COL_N_BUSY;
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_INIT: fsm_state_next = MMM_FSM_STATE_MULT_SQUARE_COL_N_TRIG ;
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_TRIG: fsm_state_next = MMM_FSM_STATE_MULT_SQUARE_COL_N_BUSY ;
+ MMM_FSM_STATE_MULT_SQUARE_COL_N_BUSY: fsm_state_next = square_done ? fsm_state_after_mult_square : MMM_FSM_STATE_MULT_SQUARE_COL_N_BUSY;
- FSM_STATE_MULT_SQUARE_HOLDOFF: fsm_state_next = rcmb_rdy ? fsm_state_after_square_holdoff : FSM_STATE_MULT_SQUARE_HOLDOFF;
+ MMM_FSM_STATE_MULT_SQUARE_HOLDOFF: fsm_state_next = rcmb_rdy ? fsm_state_after_square_holdoff : MMM_FSM_STATE_MULT_SQUARE_HOLDOFF;
- FSM_STATE_MULT_TRIANGLE_COL_0_INIT: fsm_state_next = FSM_STATE_MULT_TRIANGLE_COL_0_TRIG ;
- FSM_STATE_MULT_TRIANGLE_COL_0_TRIG: fsm_state_next = FSM_STATE_MULT_TRIANGLE_COL_0_BUSY ;
- FSM_STATE_MULT_TRIANGLE_COL_0_BUSY: fsm_state_next = triangle_done ? FSM_STATE_MULT_TRIANGLE_COL_N_INIT : FSM_STATE_MULT_TRIANGLE_COL_0_BUSY;
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_INIT: fsm_state_next = MMM_FSM_STATE_MULT_TRIANGLE_COL_0_TRIG ;
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_TRIG: fsm_state_next = MMM_FSM_STATE_MULT_TRIANGLE_COL_0_BUSY ;
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_0_BUSY: fsm_state_next = triangle_done ? MMM_FSM_STATE_MULT_TRIANGLE_COL_N_INIT : MMM_FSM_STATE_MULT_TRIANGLE_COL_0_BUSY;
- FSM_STATE_MULT_TRIANGLE_COL_N_INIT: fsm_state_next = FSM_STATE_MULT_TRIANGLE_COL_N_TRIG ;
- FSM_STATE_MULT_TRIANGLE_COL_N_TRIG: fsm_state_next = FSM_STATE_MULT_TRIANGLE_COL_N_BUSY ;
- FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: fsm_state_next = triangle_done ? fsm_state_after_mult_triangle : FSM_STATE_MULT_TRIANGLE_COL_N_BUSY;
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_INIT: fsm_state_next = MMM_FSM_STATE_MULT_TRIANGLE_COL_N_TRIG ;
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_TRIG: fsm_state_next = MMM_FSM_STATE_MULT_TRIANGLE_COL_N_BUSY ;
+ MMM_FSM_STATE_MULT_TRIANGLE_COL_N_BUSY: fsm_state_next = triangle_done ? fsm_state_after_mult_triangle : MMM_FSM_STATE_MULT_TRIANGLE_COL_N_BUSY;
- FSM_STATE_MULT_TRIANGLE_HOLDOFF: fsm_state_next = rcmb_rdy ? FSM_STATE_MULT_RECTANGLE_COL_0_INIT : FSM_STATE_MULT_TRIANGLE_HOLDOFF;
+ MMM_FSM_STATE_MULT_TRIANGLE_HOLDOFF: fsm_state_next = rcmb_rdy ? MMM_FSM_STATE_MULT_RECTANGLE_COL_0_INIT : MMM_FSM_STATE_MULT_TRIANGLE_HOLDOFF;
- FSM_STATE_MULT_RECTANGLE_COL_0_INIT: fsm_state_next = FSM_STATE_MULT_RECTANGLE_COL_0_TRIG ;
- FSM_STATE_MULT_RECTANGLE_COL_0_TRIG: fsm_state_next = FSM_STATE_MULT_RECTANGLE_COL_0_BUSY ;
- FSM_STATE_MULT_RECTANGLE_COL_0_BUSY: fsm_state_next = rectangle_done ? FSM_STATE_MULT_RECTANGLE_COL_N_INIT : FSM_STATE_MULT_RECTANGLE_COL_0_BUSY;
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_INIT: fsm_state_next = MMM_FSM_STATE_MULT_RECTANGLE_COL_0_TRIG ;
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_TRIG: fsm_state_next = MMM_FSM_STATE_MULT_RECTANGLE_COL_0_BUSY ;
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_BUSY: fsm_state_next = rectangle_done ? MMM_FSM_STATE_MULT_RECTANGLE_COL_N_INIT : MMM_FSM_STATE_MULT_RECTANGLE_COL_0_BUSY;
- FSM_STATE_MULT_RECTANGLE_COL_N_INIT: fsm_state_next = FSM_STATE_MULT_RECTANGLE_COL_N_TRIG ;
- FSM_STATE_MULT_RECTANGLE_COL_N_TRIG: fsm_state_next = FSM_STATE_MULT_RECTANGLE_COL_N_BUSY ;
- FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: fsm_state_next = rectangle_done ? fsm_state_after_mult_rectangle : FSM_STATE_MULT_RECTANGLE_COL_N_BUSY;
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_INIT: fsm_state_next = MMM_FSM_STATE_MULT_RECTANGLE_COL_N_TRIG ;
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_TRIG: fsm_state_next = MMM_FSM_STATE_MULT_RECTANGLE_COL_N_BUSY ;
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: fsm_state_next = rectangle_done ? fsm_state_after_mult_rectangle : MMM_FSM_STATE_MULT_RECTANGLE_COL_N_BUSY;
- FSM_STATE_MULT_RECTANGLE_HOLDOFF: fsm_state_next = rcmb_rdy ? FSM_STATE_WAIT_REDUCTOR : FSM_STATE_MULT_RECTANGLE_HOLDOFF;
+ MMM_FSM_STATE_MULT_RECTANGLE_HOLDOFF: fsm_state_next = rcmb_rdy ? MMM_FSM_STATE_WAIT_REDUCTOR : MMM_FSM_STATE_MULT_RECTANGLE_HOLDOFF;
- FSM_STATE_WAIT_REDUCTOR: fsm_state_next = rdct_rdy ? FSM_STATE_STOP : FSM_STATE_WAIT_REDUCTOR;
+ MMM_FSM_STATE_WAIT_REDUCTOR: fsm_state_next = rdct_rdy ? MMM_FSM_STATE_STOP : MMM_FSM_STATE_WAIT_REDUCTOR;
- FSM_STATE_STOP: fsm_state_next = FSM_STATE_IDLE ;
+ MMM_FSM_STATE_STOP: fsm_state_next = MMM_FSM_STATE_IDLE ;
- default: fsm_state_next = FSM_STATE_IDLE ;
+ default: fsm_state_next = MMM_FSM_STATE_IDLE ;
endcase
//
@@ -973,11 +971,11 @@ module modexpng_mmm_dual
assign rdct_ena = rdct_ena_reg;
- always @(posedge clk)
+ always @(posedge clk or negedge rst_n)
//
- if (rst) rdct_ena_reg <= 1'b0;
+ if (!rst_n) rdct_ena_reg <= 1'b0;
else case (fsm_state)
- FSM_STATE_MULT_RECTANGLE_COL_0_INIT: rdct_ena_reg <= 1'b1;
+ MMM_FSM_STATE_MULT_RECTANGLE_COL_0_INIT: rdct_ena_reg <= 1'b1;
default: rdct_ena_reg <= 1'b0;
endcase
@@ -989,12 +987,12 @@ module modexpng_mmm_dual
assign rdy = rdy_reg;
- always @(posedge clk)
+ always @(posedge clk or negedge rst_n)
//
- if (rst) rdy_reg <= 1'b1;
+ if (!rst_n) rdy_reg <= 1'b1;
else begin
if (rdy && ena) rdy_reg <= 1'b0;
- if (!rdy && (fsm_state == FSM_STATE_STOP)) rdy_reg <= 1'b1;
+ if (!rdy && (fsm_state == MMM_FSM_STATE_STOP)) rdy_reg <= 1'b1;
end
endmodule