From caea5e361940c0d445a7d90446641a637c6d49cc Mon Sep 17 00:00:00 2001 From: "Pavel V. Shatov (Meister)" Date: Sat, 1 Jul 2017 22:26:32 +0300 Subject: Started porting generic multiplier to Xilinx primitives. --- src/rtl/pe/artix7/multiplier32_artix7.v | 83 ++++++++++++++++++++++++++++++ src/rtl/pe/generic/multiplier32_generic.v | 85 +++++++++++++++++++++++++++++++ src/rtl/pe/modexpa7_pe_mul.v | 33 +++++++----- src/rtl/pe/modexpa7_pe_settings.v | 2 + 4 files changed, 189 insertions(+), 14 deletions(-) create mode 100644 src/rtl/pe/artix7/multiplier32_artix7.v create mode 100644 src/rtl/pe/generic/multiplier32_generic.v (limited to 'src/rtl/pe') diff --git a/src/rtl/pe/artix7/multiplier32_artix7.v b/src/rtl/pe/artix7/multiplier32_artix7.v new file mode 100644 index 0000000..5cc6340 --- /dev/null +++ b/src/rtl/pe/artix7/multiplier32_artix7.v @@ -0,0 +1,83 @@ +`timescale 1ns / 1ps + +module multiplier32_artix7 + ( + input clk, + input [31: 0] a, + input [31: 0] b, + input [31: 0] t, + input [31: 0] c_in, + output [31: 0] p, + output [31: 0] c_out + ); + + reg [31: 0] t_dly; + reg [31: 0] c_in_dly; + + always @(posedge clk) t_dly <= t; + always @(posedge clk) c_in_dly <= c_in; + + wire [31: 0] t_c_in_s; + wire t_c_in_c_out; + + reg t_c_in_c_out_dly; + + always @(posedge clk) t_c_in_c_out_dly <= t_c_in_c_out; + + adder32_artix7 add_t_c_in + ( + .clk (clk), + .a (t_dly), + .b (c_in_dly), + .c_in (1'b0), + .s (t_c_in_s), + .c_out (t_c_in_c_out) + ); + + wire [63: 0] a_b; + + wire [31: 0] a_b_lsb = a_b[31: 0]; + wire [31: 0] a_b_msb = a_b[63:32]; + + reg [31: 0] a_b_msb_dly; + + always @(posedge clk) a_b_msb_dly <= a_b_msb; + + ip_mul32 mul_a_b + ( + .clk (clk), + .a (a), + .b (b), + .p (a_b) + ); + + wire [31: 0] add_p_s; + wire add_p_c_out; + + reg [31: 0] add_p_s_dly; + + always @(posedge clk) add_p_s_dly <= add_p_s; + + assign p = add_p_s_dly; + + adder32_artix7 add_p + ( + .clk (clk), + .a (a_b_lsb), + .b (t_c_in_s), + .c_in (1'b0), + .s (add_p_s), + .c_out (add_p_c_out) + ); + + adder32_artix7 add_c_out + ( + .clk (clk), + .a (a_b_msb_dly), + .b ({{31{1'b0}}, t_c_in_c_out_dly}), + .c_in (add_p_c_out), + .s (c_out), + .c_out () + ); + +endmodule diff --git a/src/rtl/pe/generic/multiplier32_generic.v b/src/rtl/pe/generic/multiplier32_generic.v new file mode 100644 index 0000000..794ce96 --- /dev/null +++ b/src/rtl/pe/generic/multiplier32_generic.v @@ -0,0 +1,85 @@ +//====================================================================== +// +// modexpa7_pe_mul.v +// ----------------------------------------------------------------------------- +// Low-level processing element (multiplier). +// +// Authors: Pavel Shatov +// +// Copyright (c) 2017, NORDUnet A/S All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions +// are met: +// - Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// +// - Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// - Neither the name of the NORDUnet nor the names of its contributors may +// be used to endorse or promote products derived from this software +// without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS +// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A +// PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED +// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +//====================================================================== + +module multiplier32_generic + ( + input clk, + input [31: 0] a, + input [31: 0] b, + input [31: 0] t, + input [31: 0] c_in, + output [31: 0] p, + output [31: 0] c_out + ); + + // + // Customizable Latency + // + parameter LATENCY = 4; + + // + // Delay Line + // + reg [63: 0] abct[1:LATENCY]; + + // + // Outputs + // + assign p = abct[LATENCY][31: 0]; + assign c_out = abct[LATENCY][63:32]; + + // + // Sub-products + // + wire [63: 0] ab = {{32{1'b0}}, a} * {{32{1'b0}}, b}; + wire [63: 0] ct = {{32{1'b0}}, c_in} + {{32{1'b0}}, t}; + + // + // Delay + // + integer i; + always @(posedge clk) + // + for (i=1; i<=LATENCY; i=i+1) + abct[i] <= (i == 1) ? ab + ct : abct[i-1]; + +endmodule + +//====================================================================== +// End of file +//====================================================================== diff --git a/src/rtl/pe/modexpa7_pe_mul.v b/src/rtl/pe/modexpa7_pe_mul.v index ff15981..6453049 100644 --- a/src/rtl/pe/modexpa7_pe_mul.v +++ b/src/rtl/pe/modexpa7_pe_mul.v @@ -47,21 +47,26 @@ module modexpa7_pe_mul output [31: 0] c_out ); - localparam LATENCY = 4; - - reg [63: 0] abct[1:LATENCY]; - - assign p = abct[LATENCY][31: 0]; - assign c_out = abct[LATENCY][63:32]; - wire [63: 0] ab = {{32{1'b0}}, a} * {{32{1'b0}}, b}; - wire [63: 0] ct = {{32{1'b0}}, c_in} + {{32{1'b0}}, t}; - - integer i; - always @(posedge clk) - // - for (i=1; i<=LATENCY; i=i+1) - abct[i] <= (i == 1) ? ab + ct : abct[i-1]; + // + // Include Primitive Selector + // + `include "modexpa7_pe_settings.v" + + + // + // Instantiate Vendor/Generic Primitive + // + `MULTIPLIER32_PRIMITIVE multiplier32_inst + ( + .clk(clk), + .a(a), + .b(b), + .t(t), + .c_in(c_in), + .p(p), + .c_out(c_out) + ); endmodule diff --git a/src/rtl/pe/modexpa7_pe_settings.v b/src/rtl/pe/modexpa7_pe_settings.v index 97b5b89..9c16d73 100644 --- a/src/rtl/pe/modexpa7_pe_settings.v +++ b/src/rtl/pe/modexpa7_pe_settings.v @@ -4,10 +4,12 @@ `define ADDER32_PRIMITIVE adder32_artix7 `define SUBTRACTOR32_PRIMITIVE subtractor32_artix7 +`define MULTIPLIER32_PRIMITIVE multiplier32_artix7 `else `define ADDER32_PRIMITIVE adder32_generic `define SUBTRACTOR32_PRIMITIVE subtractor32_generic +`define MULTIPLIER32_PRIMITIVE multiplier32_generic `endif -- cgit v1.2.3