core/math/modexpa7 - Modular exponentiation using the Artix-7 FPGA

Age	Commit message (Collapse)	Author
2017-09-04	Updated STM32 demo program to show how to use the precomputation block.	Pavel V. Shatov (Meister)

2017-08-28	Exposed internal buffers for Montgomery factor F and modulus-dependent ↵	Pavel V. Shatov (Meister)
	speed-up coefficient N_COEFF so that they can be retireved and stored along with the modulus. Split coreesponding buffers into "input" and "output" banks, during pre-computation F and N_COEFF are written to read-only "output" banks, during exponentiation F and N_COEFF are read from read-write "input" banks and must be supplied by user.
2017-08-11	CRT mode seems to work. Finally.	Pavel V. Shatov (Meister)
	Strangely enough non-CRT mode continues to work fine(!). One does not simply add a feature without breaking something else. Very suspicious...
2017-07-23	Wrote top-level module. 4096-bit core with 16-tap systolic array synthesizes ↵	Pavel V. Shatov (Meister)
	just fine: 10% slices 8% block memory 33% DSPs
2017-06-27	Start conversion to systolic architecture.	Pavel V. Shatov (Meister)

2016-06-14	Initial commit	Paul Selkirk