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-rw-r--r--src/rtl/modexpa7_systolic_multiplier_array.v8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/rtl/modexpa7_systolic_multiplier_array.v b/src/rtl/modexpa7_systolic_multiplier_array.v
index 9b2cd94..de2a037 100644
--- a/src/rtl/modexpa7_systolic_multiplier_array.v
+++ b/src/rtl/modexpa7_systolic_multiplier_array.v
@@ -200,7 +200,7 @@ module modexpa7_systolic_multiplier_array #
wire shreg_done_unload = shreg_unload[syst_cnt_last];
reg shreg_now_loading;
- reg shreg_now_latency;
+ //reg shreg_now_latency;
reg shreg_now_unloading;
reg shreg_done_latency_dly;
@@ -215,7 +215,7 @@ module modexpa7_systolic_multiplier_array #
FSM_STATE_MULT_RELOAD: begin
//
shreg_now_loading <= 1'b1;
- shreg_now_latency <= 1'b1;
+ //shreg_now_latency <= 1'b1;
shreg_now_unloading <= 1'b0;
//
shreg_load <= {{SYSTOLIC_NUM_CYCLES-1{1'b0}}, 1'b1};
@@ -231,7 +231,7 @@ module modexpa7_systolic_multiplier_array #
shreg_unload <= {shreg_unload [SYSTOLIC_NUM_CYCLES-2:0], shreg_latency[SYSTOLIC_PE_LATENCY]};
//
if (shreg_done_load) shreg_now_loading <= 1'b0;
- if (shreg_done_latency) shreg_now_latency <= 1'b0;
+ //if (shreg_done_latency) shreg_now_latency <= 1'b0;
if (shreg_done_latency) shreg_now_unloading <= 1'b1;
else if (shreg_done_unload) shreg_now_unloading <= 1'b0;
@@ -239,7 +239,7 @@ module modexpa7_systolic_multiplier_array #
//
default: begin
shreg_now_loading <= 1'b0;
- shreg_now_latency <= 1'b0;
+ //shreg_now_latency <= 1'b0;
shreg_now_unloading <= 1'b0;
end
//