From e33ebb8bcc0bd582335e7de7b46fd9f3aedd331f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= Date: Tue, 16 Jun 2015 17:00:14 +0200 Subject: Merge of s_mux and s_write to allow cycle collapsing. --- src/rtl/montprod.v | 110 ++++++++++++++++++++++++----------------------------- 1 file changed, 49 insertions(+), 61 deletions(-) (limited to 'src') diff --git a/src/rtl/montprod.v b/src/rtl/montprod.v index 927356f..06eca12 100644 --- a/src/rtl/montprod.v +++ b/src/rtl/montprod.v @@ -67,7 +67,7 @@ module montprod( localparam CTRL_IDLE = 4'h0; localparam CTRL_INIT_S = 4'h1; - localparam CTRL_LOOP_INIT = 4'h2; + localparam CTRL_WAIT = 4'h2; localparam CTRL_LOOP_ITER = 4'h3; localparam CTRL_LOOP_BQ = 4'h4; localparam CTRL_L_CALC_SM = 4'h5; @@ -157,7 +157,7 @@ module montprod( wire shr_carry_out; wire [31 : 0] shr_adiv2; - reg in_iter; + reg set_B_bit_index; //---------------------------------------------------------------- @@ -270,27 +270,6 @@ module montprod( end // reg_update - //---------------------------------------------------------------- - // s_mux - //---------------------------------------------------------------- - always @* - begin : s_mux - case (s_mux_reg) - SMUX_0: - s_mem_new = 32'b0; - SMUX_ADD_SA: - s_mem_new = add_result_sa; - SMUX_ADD_SM: - s_mem_new = add_result_sm; - SMUX_SHR: - s_mem_new = shr_adiv2; - endcase - - if (DEBUG) - $display("S-MUX %x: %x", s_mux_reg, s_mem_new); - end - - //---------------------------------------------------------------- // bq //---------------------------------------------------------------- @@ -314,7 +293,9 @@ module montprod( //---------------------------------------------------------------- - // Process for iterating the loop counter and setting related B indexes + // loop_counter_process + // Process for iterating the loop counter and setting + // related B indices. //---------------------------------------------------------------- always @* begin : loop_counter_process @@ -322,30 +303,24 @@ module montprod( loop_counter_we = 1'b0; length_m1 = length - 1'b1; B_bit_index = B_bit_index_reg; + B_word_index = loop_counter_reg[12:5]; if (loop_counter_set) begin loop_counter_new = {length, 5'b00000} - 1'b1; - loop_counter_we = 1'b1; - end - - case (montprod_ctrl_reg) - CTRL_LOOP_ITER: - begin - B_word_index = loop_counter_reg[12:5]; - B_bit_index = 5'h1f - loop_counter_reg[4:0]; + loop_counter_we = 1'b1; end - CTRL_L_STALLPIPE_D2: - begin + if (loop_counter_dec) + begin loop_counter_new = loop_counter_reg - 1'b1; loop_counter_we = 1'b1; - end + end - default: - begin - end - endcase + if (set_B_bit_index) + begin + B_bit_index = 5'h1f - loop_counter_reg[4:0]; + end end @@ -354,6 +329,11 @@ module montprod( //---------------------------------------------------------------- always @* begin : prodcalc + opb_addr_reg = B_word_index; + opm_addr_reg = word_index_reg; + + result_addr_reg = word_index_prev_reg; + result_data_reg = s_mem_read_data; case (montprod_ctrl_reg) CTRL_LOOP_ITER: @@ -364,9 +344,6 @@ module montprod( opa_addr_reg = word_index_reg; endcase - opb_addr_reg = B_word_index; - opm_addr_reg = word_index_reg; - case (montprod_ctrl_reg) CTRL_LOOP_ITER: s_mem_addr = length_m1; @@ -374,11 +351,6 @@ module montprod( s_mem_addr = word_index_reg; endcase - - result_addr_reg = word_index_prev_reg; - result_data_reg = s_mem_read_data; - - case (montprod_ctrl_reg) CTRL_EMIT_S: tmp_result_we = 1'b1; @@ -389,23 +361,26 @@ module montprod( if (reset_word_index_LSW == 1'b1) word_index_new = length_m1; + else if (reset_word_index_MSW == 1'b1) word_index_new = 8'h0; + else if (montprod_ctrl_reg == CTRL_L_CALC_SDIV2) word_index_new = word_index_reg + 1'b1; + else word_index_new = word_index_reg - 1'b1; end // prodcalc //---------------------------------------------------------------- - // s_writer + // s_select_write //---------------------------------------------------------------- always @* - begin : s_writer - shr_carry_in_new = 1'b0; - s_mux_new = SMUX_0; - s_mem_we_new = 1'b0; + begin : s_select_write + shr_carry_in_new = 1'b0; + s_mux_new = SMUX_0; + s_mem_we_new = 1'b0; case (montprod_ctrl_reg) CTRL_INIT_S: @@ -440,18 +415,31 @@ module montprod( end endcase + s_mem_new = 32'h0; add_carry_in_sa_new = 1'b0; add_carry_in_sm_new = 1'b0; case (s_mux_reg) - SMUX_ADD_SM: - add_carry_in_sm_new = add_carry_out_sm; + SMUX_0: + s_mem_new = 32'h0; SMUX_ADD_SA: - add_carry_in_sa_new = add_carry_out_sa; + begin + s_mem_new = add_result_sa; + add_carry_in_sa_new = add_carry_out_sa; + end + + SMUX_ADD_SM: + begin + s_mem_new = add_result_sm; + add_carry_in_sm_new = add_carry_out_sm; + end SMUX_SHR: - shr_carry_in_new = shr_carry_out; + begin + s_mem_new = shr_adiv2; + shr_carry_in_new = shr_carry_out; + end default: begin @@ -474,7 +462,7 @@ module montprod( loop_counter_set = 1'b0; loop_counter_dec = 1'b0; - in_iter = 1'b0; + set_B_bit_index = 1'b0; reset_word_index_LSW = 1'b0; reset_word_index_MSW = 1'b0; @@ -501,14 +489,14 @@ module montprod( begin if (word_index_reg == 8'h0) begin - montprod_ctrl_new = CTRL_LOOP_INIT; + loop_counter_set = 1'b1; + montprod_ctrl_new = CTRL_WAIT; montprod_ctrl_we = 1'b1; end end - CTRL_LOOP_INIT: + CTRL_WAIT: begin - loop_counter_set = 1'b1; montprod_ctrl_new = CTRL_LOOP_ITER; montprod_ctrl_we = 1'b1; end @@ -517,7 +505,7 @@ module montprod( // Also abort loop if done. CTRL_LOOP_ITER: begin - in_iter = 1'b1; + set_B_bit_index = 1'b1; reset_word_index_LSW = 1'b1; montprod_ctrl_new = CTRL_LOOP_BQ; montprod_ctrl_we = 1'b1; -- cgit v1.2.3