From 46e2c534e7197b57f40ebf3e60bf4da5a0da7d3f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= Date: Wed, 17 Jun 2015 21:02:24 +0200 Subject: (1) Collapsed the sm and sa adder states. Thisimoproves performance for modexp with 3%. (2) Updated montprod testbench to not use the now removed states. (3) Minor code cleanup to make it easier to work with for further improvements. --- src/tb/tb_montprod.v | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src/tb/tb_montprod.v') diff --git a/src/tb/tb_montprod.v b/src/tb/tb_montprod.v index bf9333e..850f8d9 100644 --- a/src/tb/tb_montprod.v +++ b/src/tb/tb_montprod.v @@ -226,7 +226,7 @@ module tb_montprod(); if (SHOW_BQ_DEBUG) begin if (dut.montprod_ctrl_reg == dut.CTRL_L_CALC_SM) - $display("====================> B: %x Q: %x B_bit_index_reg: %x <=====================", dut.b_reg, dut.q_reg, dut.B_bit_index_reg); + $display("====================> B: %x Q: %x b_bit_index_reg: %x <=====================", dut.b_reg, dut.q_reg, dut.b_bit_index_reg); end end @@ -247,8 +247,6 @@ module tb_montprod(); $display("FSM: LOOP_ITER"); dut.CTRL_LOOP_BQ: $display("FSM: LOOP_BQ"); - dut.CTRL_L_CALC_SM: - $display("FSM: LOOP_CALC_SM"); dut.CTRL_L_CALC_SA: $display("FSM: LOOP_CALC_SA"); dut.CTRL_L_STALLPIPE_SA: -- cgit v1.2.3