From c8c13f792e73b0729d9c533ad3c7295657975dc4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= Date: Tue, 23 Jun 2015 08:25:24 +0200 Subject: Made the adder and shifters words size generic. Updated the montprod and residue to use the generic adder and shifters. --- src/rtl/shl32.v | 31 +++++++++++++++++-------------- 1 file changed, 17 insertions(+), 14 deletions(-) (limited to 'src/rtl/shl32.v') diff --git a/src/rtl/shl32.v b/src/rtl/shl32.v index 42521fd..bed83e8 100644 --- a/src/rtl/shl32.v +++ b/src/rtl/shl32.v @@ -1,11 +1,12 @@ //====================================================================== // -// shl32.v -// ------- -// 32bit left shift with carry in / carry out +// shl.v +// ----- +// One bit left shift of words with carry in and carry out. Used in +// the residue module of the modexp core. // // -// Author: Peter Magnusson +// Author: Peter Magnusson, Joachim Strömbergson // Copyright (c) 2015, NORDUnet A/S All rights reserved. // // Redistribution and use in source and binary forms, with or without @@ -36,18 +37,20 @@ // //====================================================================== -module shl32( - input wire [31 : 0] a, - input wire carry_in, - output wire [31 : 0] amul2, - output wire carry_out - ); +module shl #(parameter OPW = 32) + ( + input wire [(OPW - 1) : 0] a, + input wire carry_in, - assign amul2 = {a[30 : 0], carry_in}; - assign carry_out = a[31]; + output wire [(OPW - 1) : 0] amul2, + output wire carry_out + ); -endmodule // shl32 + assign amul2 = {a[(OPW - 2) : 0], carry_in}; + assign carry_out = a[(OPW - 1)]; + +endmodule // shl //====================================================================== -// EOF shl32.v +// EOF shl.v //====================================================================== -- cgit v1.2.3