From 0fa3d4900e4eb9cbf69ba927eb5823ed560fe975 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= <joachim@secworks.se>
Date: Tue, 23 Jun 2015 11:17:49 +0200
Subject: Updated the 2r1w block memory to be operand size generic. Minor fix
 in 1r1w block memory.

---
 src/rtl/blockmem1r1w.v | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/rtl/blockmem1r1w.v')

diff --git a/src/rtl/blockmem1r1w.v b/src/rtl/blockmem1r1w.v
index edff8dd..6a28cc2 100644
--- a/src/rtl/blockmem1r1w.v
+++ b/src/rtl/blockmem1r1w.v
@@ -44,7 +44,7 @@
 
 module blockmem1r1w #(parameter OPW = 32, parameter ADW = 8)
                    (
-                    input wire           clk,
+                    input wire                  clk,
 
                     input wire  [(ADW - 1) : 0] read_addr,
                     output wire [(OPW - 1) : 0] read_data,
-- 
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