From 708b71fdd50f7dd3c6851b5c47a559968767c0db Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= <joachim@secworks.se>
Date: Tue, 23 Jun 2015 17:05:53 +0200
Subject: Fixed incorrect compile time expression for sizing the memory.

---
 src/rtl/blockmem1r1w.v | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/rtl/blockmem1r1w.v b/src/rtl/blockmem1r1w.v
index 6a28cc2..6856e0a 100644
--- a/src/rtl/blockmem1r1w.v
+++ b/src/rtl/blockmem1r1w.v
@@ -54,7 +54,7 @@ module blockmem1r1w #(parameter OPW = 32, parameter ADW = 8)
                     input wire  [(OPW - 1) : 0] write_data
                    );
 
-  reg [(OPW - 1) : 0] mem [0 : (ADW ** 2 - 1)];
+  reg [(OPW - 1) : 0] mem [0 : ((2**ADW) - 1)];
   reg [(OPW - 1) : 0] tmp_read_data;
 
   assign read_data = tmp_read_data;
-- 
cgit v1.2.3