From a315223f98fa6f1fdea2b1080c5f3e33352ebb13 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= Date: Mon, 27 Apr 2015 11:17:08 +0200 Subject: Updating modexp core to v 0.50. This version contains a working core that can perform sign and verify with big keys/values. The core builds ok in Altera and Xilinx FPGA tools. This commit also includes a new testgenerator capable of generating testbench for modexp with autgenerated test data of different lengths. The README has been updated with status and implementation results in for different FPGA devices. --- .gitignore | 2 ++ 1 file changed, 2 insertions(+) (limited to '.gitignore') diff --git a/.gitignore b/.gitignore index 0836c09..11c1e07 100644 --- a/.gitignore +++ b/.gitignore @@ -31,3 +31,5 @@ toolruns/montprod.sim toolruns/top.sim toolruns/residue.sim + +toolruns/modexp.autogenerated.sim -- cgit v1.2.3