Age | Commit message (Collapse) | Author | |
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2015-04-27 | Updating modexp core to v 0.50. This version contains a working core that ↵ | Joachim Strömbergson | |
can perform sign and verify with big keys/values. The core builds ok in Altera and Xilinx FPGA tools. This commit also includes a new testgenerator capable of generating testbench for modexp with autgenerated test data of different lengths. The README has been updated with status and implementation results in for different FPGA devices. | |||
2015-04-24 | (1) Adding auto generated testbench for verilog. (2) Update of the test ↵ | Joachim Strömbergson | |
generator. (3) Update of the Makefile to run test generator. | |||
2015-04-23 | Adding a generator for tests to the modexp model and core. | Joachim Strömbergson | |
2015-04-21 | Fixed incorrect types. | Joachim Strömbergson | |
2015-04-21 | Update of modexp to include more of the integration of residue calculator. ↵ | Joachim Strömbergson | |
Update of shl and shr to simplify code. shl and shr could be replaced by functions. | |||
2015-04-20 | Adding testbench for the residue calculator. | Joachim Strömbergson | |
2015-04-20 | (1) Modexp with better API. (2) Adding working residue module. (3) Adding ↵ | Joachim Strömbergson | |
new shift32 with carry module needed by the residue module. | |||
2015-04-13 | Adding testbenches for montprod and modexp. The montprod tb has testcases ↵ | Joachim Strömbergson | |
for up to 1024 bit values. | |||
2015-04-13 | Adding initial versions of rtl for modexp. Montgomery multiplication works ↵ | Joachim Strömbergson | |
for 8192 bit operands. Modexp can build, but lacks proper control and residue generator. Memories has been tested to match block memories in Xilinx and Altera FPGAs. | |||
2015-03-13 | Adding java rsa functional model. | Joachim Strömbergson | |
2015-03-13 | Adding c model for the modexp core. | Joachim Strömbergson | |