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2015-06-25Added another state for setting s_mem_read_addr to allow shortcutting one cyc...Joachim Strömbergson
2015-06-25Minor nits.Joachim Strömbergson
2015-06-25Removed stale switch since we now do s_mem init integrated with calculation.Joachim Strömbergson
2015-06-24Removed stale mux state.Joachim Strömbergson
2015-06-24Fused the s_mem init loop into the adder loop.Joachim Strömbergson
2015-06-24Small improvement in report of test result.Joachim Strömbergson
2015-06-24Reorganized address generation and bit index generation.Joachim Strömbergson
2015-06-24Corrected suffixes and cleaned up product address generation.Joachim Strömbergson
2015-06-24(1) Untangled the word index address generator from the product logic. (2) Up...Joachim Strömbergson
2015-06-23Fixed incorrect compile time expression for sizing the memory.Joachim Strömbergson
2015-06-23Changed name of files to reflect that the adder and the shifters are now not ...Joachim Strömbergson
2015-06-23Updated all modules below modexp_core has been updated to have generic operan...Joachim Strömbergson
2015-06-23Updated the 2r1w block memory to be operand size generic. Minor fix in 1r1w b...Joachim Strömbergson
2015-06-23montprod now supports generic operand size.Joachim Strömbergson
2015-06-23Adding module parameters for generic operand size to modexp_core and top leve...Joachim Strömbergson
2015-06-23Updated residue module to use generic operand size.Joachim Strömbergson
2015-06-23Made the adder and shifters words size generic. Updated the montprod and resi...Joachim Strömbergson
2015-06-22Changed blockmem1r1w used in montprod to generic data and address widths. Upd...Joachim Strömbergson
2015-06-22Adding a minor comment in the header to exmplain what the module parameters m...Joachim Strömbergson
2015-06-22Changing module interface and internal defines to use symbolic widths for ope...Joachim Strömbergson
2015-06-22Consolidated address settings, removed stale s logic mux control, removed ext...Joachim Strömbergson
2015-06-22Killed off debug in RTL since we now whow info from TB.Joachim Strömbergson
2015-06-22Removing stale states in FSM.Joachim Strömbergson
2015-06-22Removing state that has been collapsed.Joachim Strömbergson
2015-06-22Cleanup of prodcalc.Joachim Strömbergson
2015-06-22Adding write control of s_mem for first iteration and adding a new stage in p...Joachim Strömbergson
2015-06-22Adding mux to allow integrating s_mem init with main adder loop.Joachim Strömbergson
2015-06-18Adding iteration flag to be used to remove zero fill of s_mem.Joachim Strömbergson
2015-06-18Moved s logic mux control to control fsm.Joachim Strömbergson
2015-06-18Correct update after linting.Joachim Strömbergson
2015-06-18Restored version of montprod to a version that actually works.Joachim Strömbergson
2015-06-18Combined case statements to make it easier to follow the sequences.Joachim Strömbergson
2015-06-18Update after linting after cycle collapsing.Joachim Strömbergson
2015-06-17(1) Collapsed the sm and sa adder states. Thisimoproves performance for modex...Joachim Strömbergson
2015-06-17(1) Cleaned up bit select for operand b and a. (2) Fixed name of loop counter...Joachim Strömbergson
2015-06-17Fixed order of states.Joachim Strömbergson
2015-06-16Merge of s_mux and s_write to allow cycle collapsing.Joachim Strömbergson
2015-06-16Fixed final big testcase to match python model.Joachim Strömbergson
2015-06-16Collapsing cycles for loop counter. Updating testbench to match removed cycles.Joachim Strömbergson
2015-06-16Collapsed done. Removes one cycle from each montprod.Joachim Strömbergson
2015-06-16Fixed non trivial yet fairly short testcases.Joachim Strömbergson
2015-06-15cleanup of s mem write control.Joachim Strömbergson
2015-06-15Fixed the carry registers.Joachim Strömbergson
2015-06-15Fixed prev reg:Joachim Strömbergson
2015-06-15(1) Fixing up write address register fo s mem. (2) Cleanup of loop counter.Joachim Strömbergson
2015-06-15Cleanup and fixing name in preparation for cycle crunch.Joachim Strömbergson
2015-06-15Fixed baseline.Joachim Strömbergson
2015-06-10More cleanup. Adding a lot of compile flags to be able to silence the testbench.Joachim Strömbergson
2015-06-10Added cycle counter to the montprod testbench to measure the execution time.Joachim Strömbergson
2015-06-03Adding the encipher/verify test case with 1024 bit RSA key by Rob.Joachim Strömbergson
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