aboutsummaryrefslogtreecommitdiff
path: root/src/tb/tb_montprod.v
AgeCommit message (Collapse)Author
2015-06-29Added testcase from c model that tests montprod with a lot of bit twiddling.perfoptJoachim Strömbergson
2015-06-24Fused the s_mem init loop into the adder loop.Joachim Strömbergson
2015-06-24Small improvement in report of test result.Joachim Strömbergson
2015-06-24(1) Untangled the word index address generator from the product logic. (2) ↵Joachim Strömbergson
Updated the montprod TB to match changed FSM states in montprod.
2015-06-22Removing stale states in FSM.Joachim Strömbergson
2015-06-17(1) Collapsed the sm and sa adder states. Thisimoproves performance for ↵Joachim Strömbergson
modexp with 3%. (2) Updated montprod testbench to not use the now removed states. (3) Minor code cleanup to make it easier to work with for further improvements.
2015-06-16Collapsing cycles for loop counter. Updating testbench to match removed cycles.Joachim Strömbergson
2015-06-15Fixed baseline.Joachim Strömbergson
2015-06-10More cleanup. Adding a lot of compile flags to be able to silence the testbench.Joachim Strömbergson
2015-06-10Added cycle counter to the montprod testbench to measure the execution time.Joachim Strömbergson
2015-04-27Updating modexp core to v 0.50. This version contains a working core that ↵Joachim Strömbergson
can perform sign and verify with big keys/values. The core builds ok in Altera and Xilinx FPGA tools. This commit also includes a new testgenerator capable of generating testbench for modexp with autgenerated test data of different lengths. The README has been updated with status and implementation results in for different FPGA devices.
2015-04-13Adding testbenches for montprod and modexp. The montprod tb has testcases ↵Joachim Strömbergson
for up to 1024 bit values.