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2015-04-24(1) Adding auto generated testbench for verilog. (2) Update of the test ↵Joachim Strömbergson
generator. (3) Update of the Makefile to run test generator.
2015-04-23Adding a generator for tests to the modexp model and core.Joachim Strömbergson
2015-04-21Fixed incorrect types.Joachim Strömbergson
2015-04-21Adding more targets for building, linting and simulating submodules.Joachim Strömbergson
2015-04-21Update of modexp to include more of the integration of residue calculator. ↵Joachim Strömbergson
Update of shl and shr to simplify code. shl and shr could be replaced by functions.
2015-04-20Adding testbench for the residue calculator.Joachim Strömbergson
2015-04-20(1) Modexp with better API. (2) Adding working residue module. (3) Adding ↵Joachim Strömbergson
new shift32 with carry module needed by the residue module.
2015-04-20Updated to correct license file.Joachim Strömbergson
2015-04-20Updated Makefile with residue module targets. Updated the license info.Joachim Strömbergson
2015-04-20Updated README with more info about the modexp core and status.Joachim Strömbergson
2015-04-20Adding gitignore to cleanup status checks.Joachim Strömbergson
2015-04-13Adding testbenches for montprod and modexp. The montprod tb has testcases ↵Joachim Strömbergson
for up to 1024 bit values.
2015-04-13Adding makefile for linting and for building sim targets.Joachim Strömbergson
2015-04-13Adding initial versions of rtl for modexp. Montgomery multiplication works ↵Joachim Strömbergson
for 8192 bit operands. Modexp can build, but lacks proper control and residue generator. Memories has been tested to match block memories in Xilinx and Altera FPGAs.
2015-03-13Adding java rsa functional model.Joachim Strömbergson
2015-03-13Adding c model for the modexp core.Joachim Strömbergson
2015-03-13Adding license and initial readme for the modexp core. Provides at least a ↵Joachim Strömbergson
high level intro to the core and current status.