diff options
Diffstat (limited to 'src/rtl')
| -rw-r--r-- | src/rtl/montprod.v | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/src/rtl/montprod.v b/src/rtl/montprod.v index de5e4c0..1b9346f 100644 --- a/src/rtl/montprod.v +++ b/src/rtl/montprod.v @@ -132,13 +132,13 @@ module montprod( reg [07 : 0] word_index_prev_reg; //register of what word was read previously (result address to emit) reg [07 : 0] length_m1; - reg add_carry_in_sa; - reg add_carry_new_sa; - reg add_carry_in_sm; - reg add_carry_new_sm; + reg add_carry_in_sa_reg; + reg add_carry_in_sa_new; + reg add_carry_in_sm_reg; + reg add_carry_in_sm_new; - reg shr_carry_in; - reg shr_carry_new; + reg shr_carry_in_reg; + reg shr_carry_in_new; reg reset_word_index_LSW; reg reset_word_index_MSW; @@ -187,7 +187,7 @@ module montprod( adder32 s_adder_sa( .a(s_mem_read_data), .b(opa_data), - .carry_in(add_carry_in_sa), + .carry_in(add_carry_in_sa_reg), .sum(add_result_sa), .carry_out(add_carry_out_sa) ); @@ -195,16 +195,16 @@ module montprod( adder32 s_adder_sm( .a(s_mem_read_data), .b(opm_data), - .carry_in(add_carry_in_sm), + .carry_in(add_carry_in_sm_reg), .sum(add_result_sm), .carry_out(add_carry_out_sm) ); shr32 shifter( - .a( s_mem_read_data ), - .carry_in( shr_carry_in ), - .adiv2( shr_adiv2 ), - .carry_out( shr_carry_out ) + .a(s_mem_read_data), + .carry_in(shr_carry_in_reg), + .adiv2(shr_adiv2), + .carry_out(shr_carry_out) ); @@ -223,9 +223,9 @@ module montprod( loop_counter_reg <= 13'h0; word_index_reg <= 8'h0; word_index_prev_reg <= 8'h0; - add_carry_in_sa <= 1'b0; - add_carry_in_sm <= 1'b0; - shr_carry_in <= 1'b0; + add_carry_in_sa_reg <= 1'b0; + add_carry_in_sm_reg <= 1'b0; + shr_carry_in_reg <= 1'b0; b_reg <= 1'b0; q_reg <= 1'b0; s_mux_reg <= SMUX_0; @@ -242,9 +242,9 @@ module montprod( word_index_reg <= word_index_new; word_index_prev_reg <= word_index_reg; - shr_carry_in <= shr_carry_new; - add_carry_in_sa <= add_carry_new_sa; - add_carry_in_sm <= add_carry_new_sm; + shr_carry_in_reg <= shr_carry_in_new; + add_carry_in_sa_reg <= add_carry_in_sa_new; + add_carry_in_sm_reg <= add_carry_in_sm_new; B_bit_index_reg <= B_bit_index; q_reg <= q; @@ -255,13 +255,13 @@ module montprod( if (ready_we) ready_reg <= ready_new; + if (loop_counter_we) + loop_counter_reg <= loop_counter_new; + if (montprod_ctrl_we) begin montprod_ctrl_reg <= montprod_ctrl_new; end - - if (loop_counter_we) - loop_counter_reg <= loop_counter_new; end end // reg_update @@ -403,7 +403,7 @@ module montprod( //---------------------------------------------------------------- always @* begin : s_writer - shr_carry_new = 1'b0; + shr_carry_in_new = 1'b0; s_mux_new = SMUX_0; s_mem_we_new = 1'b0; @@ -440,18 +440,18 @@ module montprod( end endcase - add_carry_new_sa = 1'b0; - add_carry_new_sm = 1'b0; + add_carry_in_sa_new = 1'b0; + add_carry_in_sm_new = 1'b0; case (s_mux_reg) SMUX_ADD_SM: - add_carry_new_sm = add_carry_out_sm; + add_carry_in_sm_new = add_carry_out_sm; SMUX_ADD_SA: - add_carry_new_sa = add_carry_out_sa; + add_carry_in_sa_new = add_carry_out_sa; SMUX_SHR: - shr_carry_new = shr_carry_out; + shr_carry_in_new = shr_carry_out; default: begin |