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| -rw-r--r-- | README.md | 15 |
1 files changed, 14 insertions, 1 deletions
@@ -26,7 +26,9 @@ FPGA and ASIC devices. No vendor specific macros are used in the code. The core is using Montgomery multiplication with 32-bit operands. The core is iterative and will not be the fastest core on the -planet. +planet. The residue calculation is done in a separate process and the +calculated residue can be extracted and loaded by the application to +improve performance. The core will perform blinding to protect against side channel attacks. @@ -39,6 +41,13 @@ No results yet. ## Status ## +***(2015-04-20)*** + +The Montgomery calculator has been implemented and debugged. The residue +calculator has been implemeted and debugged. The top level is being +developed and debugged. + + ***(2015-03-13)*** A working, bit exact C model with test cases has been developed and is @@ -47,3 +56,7 @@ available as support for high level undertanding. Development of the Montgomery product module started. Top level modexp module with memories for all operands are being worked on. + +The Montgomery calculator has been implemented and debugged. The residue +calculator has been implemeted and debugged. The top level is being +developed and debugged. |