diff options
| -rw-r--r-- | src/tb/tb_montprod.v | 59 |
1 files changed, 32 insertions, 27 deletions
diff --git a/src/tb/tb_montprod.v b/src/tb/tb_montprod.v index 2cadd78..9a6d2b0 100644 --- a/src/tb/tb_montprod.v +++ b/src/tb/tb_montprod.v @@ -210,10 +210,10 @@ module tb_montprod(); begin : s_monitor if (SHOW_S_MONITOR) begin - $display("S[ 0 ]: %x", dut.s_mem.mem[0] ); + $display("S[0x00]: 0x%08x", dut.s_mem.mem[0]); - if (dut.s_mem_we) - $display("Write to S[0x%02x]: 0x%08x", dut.s_mem_wr_addr, dut.s_mem_new); + if (dut.s_mem_we_reg) + $display("Write to S[0x%02x]: 0x%08x", dut.s_mem_write_addr, dut.s_mem_write_data); end end @@ -225,8 +225,8 @@ module tb_montprod(); begin : bq_debug if (SHOW_BQ_DEBUG) begin - if (dut.montprod_ctrl_reg == dut.CTRL_L_CALC_SM) - $display("====================> B: %x Q: %x B_bit_index_reg: %x <=====================", dut.b_reg, dut.q_reg, dut.B_bit_index_reg); + if (dut.montprod_ctrl_reg == dut.CTRL_CALC_ADD) + $display("====================> B: %x Q: %x b_bit_index_reg: %x <=====================", dut.b_reg, dut.q_reg, dut.b_bit_index_reg); end end @@ -241,26 +241,18 @@ module tb_montprod(); case (dut.montprod_ctrl_new) dut.CTRL_IDLE: $display("FSM: IDLE"); - dut.CTRL_INIT_S: - $display("FSM: INIT_S"); - dut.CTRL_LOOP_INIT: - $display("FSM: LOOP_INIT"); dut.CTRL_LOOP_ITER: $display("FSM: LOOP_ITER"); dut.CTRL_LOOP_BQ: $display("FSM: LOOP_BQ"); - dut.CTRL_L_CALC_SM: - $display("FSM: LOOP_CALC_SM"); - dut.CTRL_L_CALC_SA: - $display("FSM: LOOP_CALC_SA"); - dut.CTRL_L_STALLPIPE_SA: - $display("FSM: STALL_PIPE"); - dut.CTRL_L_CALC_SDIV2: - $display("FSM: LOOP_CALC_SDIV2"); + dut.CTRL_CALC_ADD: + $display("FSM: LOOP_CALC_ADD"); + dut.CTRL_STALLPIPE_ADD: + $display("FSM: STALL_PIPE_ADD"); + dut.CTRL_CALC_SDIV2: + $display("FSM: CALC_SDIV2"); dut.CTRL_EMIT_S: $display("FSM: LOOP_EMIT_S"); - dut.CTRL_DONE: - $display("FSM: DONE"); default: $display("FSM: %x", dut.montprod_ctrl_new); endcase @@ -359,7 +351,7 @@ module tb_montprod(); input [0 : 8192-1] expected ); begin - $display("*** Mongomry multiplier test started"); + $display("*** Montgomery multiplier test started"); begin: copy_test_vectors integer i; integer j; @@ -407,10 +399,13 @@ module tb_montprod(); end test_mont_prod_success = test_mont_prod_success + success; test_mont_prod_fail = test_mont_prod_fail + fail; - end - $display("*** test stopped"); - $display(""); + if (success) + $display("*** test stopped, test successful."); + else + $display("*** test stopped, test failed."); + $display(""); + end end endtask // test_mont_prod @@ -425,19 +420,19 @@ module tb_montprod(); begin : short_tests //* A= b B= 11 M= 13 A*B= 10 Ar= 9 Br= 7 Ar*Br= 1 A*B= 10 - test_mont_prod( 1, {32'h9, 8160'h0}, {32'h7, 8160'h0}, {32'h13,8160'h0}, {32'h1,8160'h0} ); +// test_mont_prod( 1, {32'h9, 8160'h0}, {32'h7, 8160'h0}, {32'h13,8160'h0}, {32'h1,8160'h0} ); //* A= b B= 13 M= 11 A*B= 5 Ar= b Br= 2 Ar*Br= 5 A*B= 5 - test_mont_prod( 1, {32'hb, 8160'h0}, {32'h2, 8160'h0}, {32'h11,8160'h0}, {32'h5,8160'h0} ); +// test_mont_prod( 1, {32'hb, 8160'h0}, {32'h2, 8160'h0}, {32'h11,8160'h0}, {32'h5,8160'h0} ); //* A= 11 B= b M= 13 A*B= 10 Ar= 7 Br= 9 Ar*Br= 1 A*B= 10 - test_mont_prod( 1, {32'h7, 8160'h0}, {32'h9, 8160'h0}, {32'h13,8160'h0}, {32'h1,8160'h0} ); +// test_mont_prod( 1, {32'h7, 8160'h0}, {32'h9, 8160'h0}, {32'h13,8160'h0}, {32'h1,8160'h0} ); //* A= 11 B= 13 M= b A*B= 4 Ar= 2 Br= a Ar*Br= 5 A*B= 4 - test_mont_prod( 1, {32'h2, 8160'h0}, {32'ha, 8160'h0}, {32'h0b,8160'h0}, {32'h5,8160'h0} ); +// test_mont_prod( 1, {32'h2, 8160'h0}, {32'ha, 8160'h0}, {32'h0b,8160'h0}, {32'h5,8160'h0} ); //* A= 13 B= b M= 11 A*B= 5 Ar= 2 Br= b Ar*Br= 5 A*B= 5 //* A= 13 B= 11 M= b A*B= 4 Ar= a Br= 2 Ar*Br= 5 A*B= 4 @@ -458,6 +453,16 @@ module tb_montprod(); //debug B => 0 0 4000 //debug M => 1ffffff ffffffff ffffffff //debug s => 0 0 80 + + $display("*** testcase for montprod with lots of bit twiddling."); + test_mont_prod(2, + {64'hffeeffee12345678, 8128'h0}, + {64'hffeeffeeaabbaabb, 8128'h0}, + {64'hffeeffeedeadbeef, 8128'h0}, + {64'h0068e96e67b14db3, 8128'h0}); + + + $display("*** 96 bit test case.."); test_mont_prod( 3, {96'h1, 8096'h0}, {96'h4000, 8096'h0}, {96'h1ffffffffffffffffffffff,8096'h0}, {96'h80,8096'h0} ); end endtask // short_tests |