Cleanup and fixing name in preparation for cycle crunch.

1 files changed, 100 insertions, 86 deletions

diff --git a/src/rtl/montprod.v b/src/rtl/montprod.v
index 6b525f7..85eea11 100644
--- a/src/rtl/montprod.v
+++ b/src/rtl/montprod.v
@@ -80,15 +80,15 @@ module montprod(
   localparam CTRL_EMIT_S         = 4'hC;
   localparam CTRL_DONE           = 4'hD;
 
-  localparam SMUX_0            = 2'h0;
-  localparam SMUX_ADD_SM       = 2'h1;
-  localparam SMUX_ADD_SA       = 2'h2;
-  localparam SMUX_SHR          = 2'h3;
+  localparam SMUX_0              = 2'h0;
+  localparam SMUX_ADD_SM         = 2'h1;
+  localparam SMUX_ADD_SA         = 2'h2;
+  localparam SMUX_SHR            = 2'h3;
+
 
   //----------------------------------------------------------------
   // Registers including update variables and write enable.
   //----------------------------------------------------------------
-
   reg [07 : 0] opa_addr_reg;
   reg [07 : 0] opb_addr_reg;
   reg [07 : 0] opm_addr_reg;
@@ -107,21 +107,22 @@ module montprod(
   reg  [1 : 0] s_mux_new;
   reg  [1 : 0] s_mux_reg;
 
-  reg [31 : 0] s_mem_new;
-  reg          s_mem_we;
-  reg          s_mem_we_new;
-  reg [07 : 0] s_mem_addr;
-  reg [07 : 0] s_mem_wr_addr;
+  reg [31 : 0]  s_mem_new;
+  reg           s_mem_we_reg;
+  reg           s_mem_we_new;
+  reg [07 : 0]  s_mem_addr;
+  reg [07 : 0]  s_mem_wr_addr;
   wire [31 : 0] s_mem_read_data;
 
-  reg          q; //q = (s - b * A) & 1
-  reg          q_reg;
-  reg          b; //b: bit of B
-  reg          b_reg;
+  reg           q; //q = (s - b * A) & 1
+  reg           q_reg;
+  reg           b; //b: bit of B
+  reg           b_reg;
 
   reg [12 : 0] loop_counter;
   reg [12 : 0] loop_counter_new;
   reg [12 : 0] loop_counter_dec;
+
   reg [07 : 0] B_word_index; //loop counter as a word index
   reg [04 : 0] B_bit_index; //loop counter as a bit index
   reg [04 : 0] B_bit_index_reg; //loop counter as a bit index
@@ -173,55 +174,38 @@ module montprod(
   //----------------------------------------------------------------
   // Instantions
   //----------------------------------------------------------------
-
   blockmem1r1w s_mem(
                      .clk(clk),
                      .read_addr(s_mem_addr),
                      .read_data(s_mem_read_data),
-                     .wr(s_mem_we),
+                     .wr(s_mem_we_reg),
                      .write_addr(s_mem_wr_addr),
                      .write_data(s_mem_new)
                     );
 
 
   adder32 s_adder_sa(
-    .a(s_mem_read_data),
-    .b(opa_data),
-    .carry_in(add_carry_in_sa),
-    .sum(add_result_sa),
-    .carry_out(add_carry_out_sa)
-  );
+                     .a(s_mem_read_data),
+                     .b(opa_data),
+                     .carry_in(add_carry_in_sa),
+                     .sum(add_result_sa),
+                     .carry_out(add_carry_out_sa)
+                    );
 
   adder32 s_adder_sm(
-    .a(s_mem_read_data),
-    .b(opm_data),
-    .carry_in(add_carry_in_sm),
-    .sum(add_result_sm),
-    .carry_out(add_carry_out_sm)
-  );
+                     .a(s_mem_read_data),
+                     .b(opm_data),
+                     .carry_in(add_carry_in_sm),
+                     .sum(add_result_sm),
+                     .carry_out(add_carry_out_sm)
+                    );
 
   shr32 shifter(
-     .a( s_mem_read_data ),
-     .carry_in( shr_carry_in ),
-     .adiv2( shr_adiv2 ),
-     .carry_out( shr_carry_out )
-  );
-
-  always @*
-    begin : s_mux
-      case (s_mux_reg)
-        SMUX_0:
-          s_mem_new = 32'b0;
-        SMUX_ADD_SA:
-          s_mem_new = add_result_sa;
-        SMUX_ADD_SM:
-          s_mem_new = add_result_sm;
-        SMUX_SHR:
-          s_mem_new = shr_adiv2;
-      endcase
-      if (DEBUG)
-        $display("SMUX%x: %x", s_mux_reg, s_mem_new);
-    end
+                .a( s_mem_read_data ),
+                .carry_in( shr_carry_in ),
+                .adiv2( shr_adiv2 ),
+                .carry_out( shr_carry_out )
+               );
 
 
   //----------------------------------------------------------------
@@ -246,7 +230,7 @@ module montprod(
           b_reg             <= 1'b0;
           q_reg             <= 1'b0;
           s_mux_reg         <= SMUX_0;
-          s_mem_we          <= 1'b0;
+          s_mem_we_reg      <= 1'b0;
           s_mem_wr_addr     <= 8'h0;
           B_bit_index_reg   <= 5'h0;
         end
@@ -262,7 +246,7 @@ module montprod(
 
           s_mem_wr_addr <= s_mem_addr;
 
-          s_mem_we <= s_mem_we_new;
+          s_mem_we_reg <= s_mem_we_new;
 
           word_index <= word_index_new;
           word_index_prev <= word_index;
@@ -280,28 +264,58 @@ module montprod(
       end
     end // reg_update
 
+
+  //----------------------------------------------------------------
+  // s_mux
+  //----------------------------------------------------------------
   always @*
-   begin : bq_process
+    begin : s_mux
+      case (s_mux_reg)
+        SMUX_0:
+          s_mem_new = 32'b0;
+        SMUX_ADD_SA:
+          s_mem_new = add_result_sa;
+        SMUX_ADD_SM:
+          s_mem_new = add_result_sm;
+        SMUX_SHR:
+          s_mem_new = shr_adiv2;
+      endcase
+
+      if (DEBUG)
+        $display("S-MUX %x: %x", s_mux_reg, s_mem_new);
+    end
+
+
+  //----------------------------------------------------------------
+  // bq
+  //----------------------------------------------------------------
+  always @*
+   begin : bq
       b = b_reg;
       q = q_reg;
+
       if (montprod_ctrl_reg == CTRL_LOOP_BQ)
          begin
            b = opb_data[ B_bit_index_reg ];
            //opa_addr will point to length-1 to get A LSB.
            //s_read_addr will point to length-1
            q = s_mem_read_data[0] ^ (opa_data[0] & b);
+
            if (DEBUG)
-             $display("s_mem_read_data: %x opa_data %x b %x q %x B_bit_index_reg %x", s_mem_read_data, opa_data, b, q, B_bit_index_reg);
-        end
-   end
+             $display("s_mem_read_data: %x opa_data %x b %x q %x B_bit_index_reg %x",
+                      s_mem_read_data, opa_data, b, q, B_bit_index_reg);
+         end
+   end // bq
 
 
   //----------------------------------------------------------------
-  // Process for iterating the loop counter and setting related B indexes
+  // loop_counter_logic
+  // Logic for the loop counter and setting related B indices.
   //----------------------------------------------------------------
   always @*
-   begin : loop_counter_process
-     loop_counter_new  = loop_counter;
+    begin : loop_counter_logic
+
+      loop_counter_new  = loop_counter;
       length_m1        = length - 1'b1;
       loop_counter_dec = loop_counter - 1'b1;
       B_word_index     = loop_counter[12:5];
@@ -313,12 +327,12 @@ module montprod(
 
         CTRL_LOOP_ITER:
           begin
-            B_word_index     = loop_counter[12:5];
-            B_bit_index      = 5'h1f - loop_counter[4:0];
+            B_word_index = loop_counter[12:5];
+            B_bit_index  = 5'h1f - loop_counter[4:0];
           end
 
         CTRL_L_STALLPIPE_D2:
-            loop_counter_new = loop_counter_dec;
+          loop_counter_new = loop_counter_dec;
 
         default:
           loop_counter_new = loop_counter;
@@ -376,12 +390,15 @@ module montprod(
     end // prodcalc
 
 
+  //----------------------------------------------------------------
+  // s_writer
+  //----------------------------------------------------------------
   always @*
-    begin : s_writer_process
+    begin : s_writer
       shr_carry_new    = 1'b0;
       s_mux_new        = SMUX_0;
-
       s_mem_we_new  = 1'b0;
+
       case (montprod_ctrl_reg)
         CTRL_INIT_S:
           begin
@@ -432,8 +449,7 @@ module montprod(
           begin
           end
       endcase
-
-    end // prodcalc
+    end // block: s_writer
 
 
   //----------------------------------------------------------------
@@ -490,31 +506,31 @@ module montprod(
         CTRL_LOOP_ITER:
           begin
             reset_word_index_LSW = 1'b1;
-            montprod_ctrl_new = CTRL_LOOP_BQ;
-            montprod_ctrl_we  = 1'b1;
+            montprod_ctrl_new    = CTRL_LOOP_BQ;
+            montprod_ctrl_we     = 1'b1;
           end
 
         CTRL_LOOP_BQ:
           begin
             reset_word_index_LSW = 1'b1;
-            montprod_ctrl_new = CTRL_L_CALC_SM;
-            montprod_ctrl_we  = 1'b1;
+            montprod_ctrl_new    = CTRL_L_CALC_SM;
+            montprod_ctrl_we     = 1'b1;
           end
 
         CTRL_L_CALC_SM:
           begin
             if (word_index == 8'h0)
               begin
-                reset_word_index_LSW  = 1'b1;
-                montprod_ctrl_we  = 1'b1;
-                montprod_ctrl_new = CTRL_L_STALLPIPE_SM;
+                reset_word_index_LSW = 1'b1;
+                montprod_ctrl_we     = 1'b1;
+                montprod_ctrl_new    = CTRL_L_STALLPIPE_SM;
               end
           end
 
         CTRL_L_STALLPIPE_SM:
           begin
-            montprod_ctrl_new = CTRL_L_CALC_SA;
-            montprod_ctrl_we = 1'b1;
+            montprod_ctrl_new    = CTRL_L_CALC_SA;
+            montprod_ctrl_we     = 1'b1;
             reset_word_index_LSW = 1'b1;
           end
 
@@ -522,16 +538,16 @@ module montprod(
           begin
             if (word_index == 8'h0)
               begin
-                reset_word_index_LSW  = 1'b1;
-                montprod_ctrl_new = CTRL_L_STALLPIPE_SA;
-                montprod_ctrl_we = 1'b1;
+                reset_word_index_LSW = 1'b1;
+                montprod_ctrl_new    = CTRL_L_STALLPIPE_SA;
+                montprod_ctrl_we     = 1'b1;
               end
           end
 
         CTRL_L_STALLPIPE_SA:
           begin
-            montprod_ctrl_new = CTRL_L_CALC_SDIV2;
-            montprod_ctrl_we = 1'b1;
+            montprod_ctrl_new    = CTRL_L_CALC_SDIV2;
+            montprod_ctrl_we     = 1'b1;
             reset_word_index_MSW = 1'b1;
           end
 
@@ -540,28 +556,26 @@ module montprod(
             if (word_index == length_m1)
               begin
                 montprod_ctrl_new = CTRL_L_STALLPIPE_D2;
-                montprod_ctrl_we = 1'b1;
-                //reset_word_index = 1'b1;
+                montprod_ctrl_we  = 1'b1;
               end
           end
 
         CTRL_L_STALLPIPE_D2:
           begin
-            montprod_ctrl_new = CTRL_LOOP_ITER; //loop
-            montprod_ctrl_we = 1'b1;
+            montprod_ctrl_new    = CTRL_LOOP_ITER; //loop
+            montprod_ctrl_we     = 1'b1;
             reset_word_index_LSW = 1'b1;
             if (loop_counter == 0)
               begin
                 montprod_ctrl_new = CTRL_L_STALLPIPE_ES;
-                montprod_ctrl_we = 1'b1;
+                montprod_ctrl_we  = 1'b1;
               end
           end
 
         CTRL_L_STALLPIPE_ES:
           begin
             montprod_ctrl_new = CTRL_EMIT_S;
-            montprod_ctrl_we = 1'b1;
-            //reset_word_index_LSW = 1'b1;
+            montprod_ctrl_we  = 1'b1;
           end
 
         CTRL_EMIT_S: