aboutsummaryrefslogtreecommitdiff
path: root/src/testgenerator/.project
diff options
context:
space:
mode:
authorJoachim StroĢˆmbergson <joachim@secworks.se>2015-04-27 11:17:08 +0200
committerJoachim StroĢˆmbergson <joachim@secworks.se>2015-04-27 11:17:08 +0200
commita315223f98fa6f1fdea2b1080c5f3e33352ebb13 (patch)
tree0fb3f6c458df78f58017e9475ff3b0c5cb3b52d0 /src/testgenerator/.project
parent502f0f429a261628fe5e43582280012541c40804 (diff)
Updating modexp core to v 0.50. This version contains a working core that can perform sign and verify with big keys/values. The core builds ok in Altera and Xilinx FPGA tools. This commit also includes a new testgenerator capable of generating testbench for modexp with autgenerated test data of different lengths. The README has been updated with status and implementation results in for different FPGA devices.
Diffstat (limited to 'src/testgenerator/.project')
0 files changed, 0 insertions, 0 deletions