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authorJoachim Strömbergson <joachim@secworks.se>2015-06-23 08:25:24 +0200
committerJoachim Strömbergson <joachim@secworks.se>2015-06-23 08:25:24 +0200
commitc8c13f792e73b0729d9c533ad3c7295657975dc4 (patch)
tree5ff626a6bca289201fce6d159468567927707276 /src/rtl/shr32.v
parent5a0a6f87f2f63f9f1044725db0cac212c63f1fd6 (diff)
Made the adder and shifters words size generic. Updated the montprod and residue to use the generic adder and shifters.
Diffstat (limited to 'src/rtl/shr32.v')
-rw-r--r--src/rtl/shr32.v25
1 files changed, 14 insertions, 11 deletions
diff --git a/src/rtl/shr32.v b/src/rtl/shr32.v
index 66b15c3..40ef111 100644
--- a/src/rtl/shr32.v
+++ b/src/rtl/shr32.v
@@ -2,10 +2,11 @@
//
// shr32.v
// -------
-// 32bit right shift with carry in / carry out.
+// One bit right shift with carry in and carry out.
+// Used in the montprod module of the modexp core.
//
//
-// Author: Peter Magnusson
+// Author: Peter Magnusson, Joachim Strömbergson
// Copyright (c) 2015, NORDUnet A/S All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
@@ -36,18 +37,20 @@
//
//======================================================================
-module shr32(
- input wire [31 : 0] a,
- input wire carry_in,
- output wire [31 : 0] adiv2,
- output wire carry_out
- );
+module shr #(parameter OPW = 32)
+ (
+ input wire [(OPW - 1) : 0] a,
+ input wire carry_in,
- assign adiv2 = {carry_in, a[31 : 1]};
+ output wire [(OPW - 1) : 0] adiv2,
+ output wire carry_out
+ );
+
+ assign adiv2 = {carry_in, a[(OPW - 1) : 1]};
assign carry_out = a[0];
-endmodule // shr32
+endmodule // shr
//======================================================================
-// EOF shr32.v
+// EOF shr.v
//======================================================================