Changed name of files to reflect that the adder and the shifters are now not specifically working on 32-bit operands. HEADSUP: This breaks builds that use the old file names.

1 files changed, 0 insertions, 56 deletions

diff --git a/src/rtl/shr32.v b/src/rtl/shr32.v
deleted file mode 100644
index 40ef111..0000000
--- a/src/rtl/shr32.v
+++ /dev/null
@@ -1,56 +0,0 @@
-//======================================================================
-//
-// shr32.v
-// -------
-// One bit right shift with carry in and carry out.
-// Used in the montprod module of the modexp core.
-//
-//
-// Author: Peter Magnusson, Joachim Strömbergson
-// Copyright (c) 2015, NORDUnet A/S All rights reserved.
-//
-// Redistribution and use in source and binary forms, with or without
-// modification, are permitted provided that the following conditions are
-// met:
-// - Redistributions of source code must retain the above copyright notice,
-//   this list of conditions and the following disclaimer.
-//
-// - Redistributions in binary form must reproduce the above copyright
-//   notice, this list of conditions and the following disclaimer in the
-//   documentation and/or other materials provided with the distribution.
-//
-// - Neither the name of the NORDUnet nor the names of its contributors may
-//   be used to endorse or promote products derived from this software
-//   without specific prior written permission.
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-// PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
-// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
-// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//======================================================================
-
-module shr #(parameter OPW = 32)
-          (
-           input wire  [(OPW - 1) : 0] a,
-           input wire                  carry_in,
-
-           output wire [(OPW - 1) : 0] adiv2,
-           output wire                 carry_out
-          );
-
-  assign adiv2      = {carry_in, a[(OPW - 1) : 1]};
-  assign carry_out = a[0];
-
-endmodule // shr
-
-//======================================================================
-// EOF shr.v
-//======================================================================