Adding initial versions of rtl for modexp. Montgomery multiplication works for 8192 bit operands. Modexp can build, but lacks proper control and residue generator. Memories has been tested to match block memories in Xilinx and Altera FPGAs.

1 files changed, 224 insertions, 0 deletions

diff --git a/src/rtl/residue.v b/src/rtl/residue.v
new file mode 100644
index 0000000..2991dd6
--- /dev/null
+++ b/src/rtl/residue.v
@@ -0,0 +1,224 @@
+//======================================================================
+//
+// residue.v
+// ---------
+// Modulus 2**2N residue calculator for montgomery calculations.
+//
+// m_residue_2_2N_array( N, M, Nr)
+//   Nr = 00...01 ; Nr = 1 == 2**(2N-2N)
+//   for (int i = 0; i < 2 * N; i++)
+//     Nr = Nr shift left 1
+//     if (Nr less than M) continue;
+//     Nr = Nr - M
+// return Nr
+//
+//
+//
+// Author: Peter Magnusson
+// Copyright (c) 2015, NORDUnet A/S All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+// - Redistributions of source code must retain the above copyright notice,
+//   this list of conditions and the following disclaimer.
+//
+// - Redistributions in binary form must reproduce the above copyright
+//   notice, this list of conditions and the following disclaimer in the
+//   documentation and/or other materials provided with the distribution.
+//
+// - Neither the name of the NORDUnet nor the names of its contributors may
+//   be used to endorse or promote products derived from this software
+//   without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+// PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+//======================================================================
+
+module residue(
+  input wire clk,
+  input wire reset_n,
+
+  input wire  calculate,
+  output wire ready,
+
+  input wire  [07 : 0] nn,
+  input wire  [07 : 0] length,
+
+  output wire [07 : 0] opa_rd_addr,
+  input wire  [31 : 0] opa_rd_data,
+  output wire [07 : 0] opa_wr_addr,
+  output wire [31 : 0] opa_wr_data,
+  output wire          opa_wr_we,
+
+  output wire [07 : 0] opm_addr,
+  input wire  [31 : 0] opm_data
+
+);
+
+//----------------------------------------------------------------
+// Internal constant and parameter definitions.
+//----------------------------------------------------------------
+
+
+localparam CTRL_IDLE          = 4'h0;
+localparam CTRL_INIT          = 4'h1;
+localparam CTRL_INIT_STALL    = 4'h2;
+localparam CTRL_SHL           = 4'h3;
+localparam CTRL_SHL_STALL     = 4'h4;
+localparam CTRL_COMPARE       = 4'h5;
+localparam CTRL_COMPARE_STALL = 4'h6;
+localparam CTRL_SUB           = 4'h7;
+localparam CTRL_SUB_STALL     = 4'h8;
+localparam CTRL_LOOP          = 4'h9;
+
+//----------------------------------------------------------------
+// Registers including update variables and write enable.
+//----------------------------------------------------------------
+
+reg [07 : 0] opa_rd_addr_reg;
+reg [07 : 0] opa_wr_addr_reg;
+reg [31 : 0] opa_wr_data_reg;
+reg          opa_wr_we_reg;
+reg [07 : 0] opm_addr_reg;
+reg          ready_reg;
+reg          ready_new;
+reg          ready_we;
+reg [03 : 0] residue_ctrl_reg;
+reg [03 : 0] residue_ctrl_new;
+reg          residue_ctrl_we;
+reg          reset_word_index;
+reg          reset_n_counter;
+reg [07 : 0] word_index;
+
+//----------------------------------------------------------------
+// Concurrent connectivity for ports etc.
+//----------------------------------------------------------------
+assign opa_rd_addr = opa_rd_addr_reg;
+assign opa_wr_addr = opa_wr_addr_reg;
+assign opa_wr_data = opa_wr_data_reg;
+assign opm_addr    = opm_addr_reg;
+assign ready       = ready_reg;
+
+
+
+
+  //----------------------------------------------------------------
+  // reg_update
+  //----------------------------------------------------------------
+  always @ (posedge clk or negedge reset_n)
+    begin
+      if (!reset_n)
+        begin
+          residue_ctrl_reg <= CTRL_IDLE;
+        end
+      else
+        begin
+          if (residue_ctrl_we)
+            residue_ctrl_reg <= residue_ctrl_new;
+        end
+    end // reg_update
+
+
+  //----------------------------------------------------------------
+  //----------------------------------------------------------------
+  always @*
+    begin : process_1_to_2n
+    end
+
+  //----------------------------------------------------------------
+  //----------------------------------------------------------------
+  always @*
+    begin : word_index_process
+    end
+
+//----------------------------------------------------------------
+// residue_ctrl
+//
+// Control FSM for residue
+//----------------------------------------------------------------
+always @*
+  begin : residue_ctrl
+    ready_new = 1'b0;
+    ready_we  = 1'b0;
+    residue_ctrl_new = CTRL_IDLE;
+    residue_ctrl_we  = 1'b0;
+    reset_word_index = 1'b0;
+    reset_n_counter  = 1'b0;
+
+    case (residue_ctrl_reg)
+      CTRL_IDLE:
+        if (calculate)
+          begin
+            ready_new = 1'b0;
+            ready_we  = 1'b1;
+            residue_ctrl_new = CTRL_INIT;
+            residue_ctrl_we  = 1'b1;
+            reset_word_index = 1'b1;
+          end
+
+      CTRL_INIT:
+        if (word_index == 8'h0)
+          begin
+            residue_ctrl_new = CTRL_INIT_STALL;
+            residue_ctrl_we  = 1'b1;
+          end
+
+      CTRL_INIT_STALL:
+        begin
+          reset_word_index = 1'b1;
+          reset_n_counter  = 1'b1;
+          residue_ctrl_new = CTRL_COMPARE;
+          residue_ctrl_we  = 1'b1;
+        end
+
+      CTRL_COMPARE:
+        begin
+        end
+
+      CTRL_COMPARE_STALL:
+        begin
+        end
+
+      CTRL_SUB:
+        begin
+        end
+
+      CTRL_SUB_STALL:
+        begin
+        end
+
+      CTRL_SHL:
+        begin
+        end
+
+      CTRL_SHL_STALL:
+        begin
+        end
+
+      CTRL_LOOP:
+        begin
+        end
+
+      default:
+        begin
+        end
+
+    endcase
+  end
+
+endmodule // residue
+
+//======================================================================
+// EOF residue.v
+//======================================================================