diff options
author | Joachim StroĢmbergson <joachim@secworks.se> | 2015-06-30 16:15:30 +0200 |
---|---|---|
committer | Joachim StroĢmbergson <joachim@secworks.se> | 2015-06-30 16:15:30 +0200 |
commit | 06fa4cc16f62f156143949328da7f6ab578cb365 (patch) | |
tree | e5f20dca7676d35ca2fe917ca02a4afb0cbff1af /src/rtl/blockmem2r1w.v | |
parent | ad4531bc8853d4ca349bb9afa25049631c0abbde (diff) |
Fixed errors in block memories.debug_bigoperands
Diffstat (limited to 'src/rtl/blockmem2r1w.v')
-rw-r--r-- | src/rtl/blockmem2r1w.v | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/src/rtl/blockmem2r1w.v b/src/rtl/blockmem2r1w.v index 252764f..aa44101 100644 --- a/src/rtl/blockmem2r1w.v +++ b/src/rtl/blockmem2r1w.v @@ -39,23 +39,24 @@ // //====================================================================== -module blockmem2r1w( - input wire clk, +module blockmem2r1w #(parameter OPW = 32, parameter ADW = 8) + ( + input wire clk, - input wire [07 : 0] read_addr0, - output wire [31 : 0] read_data0, + input wire [(ADW - 1) : 0] read_addr0, + output wire [(OPW - 1) : 0] read_data0, - input wire [07 : 0] read_addr1, - output wire [31 : 0] read_data1, + input wire [(ADW - 1) : 0] read_addr1, + output wire [(OPW - 1) : 0] read_data1, - input wire wr, - input wire [07 : 0] write_addr, - input wire [31 : 0] write_data + input wire wr, + input wire [(ADW - 1) : 0] write_addr, + input wire [(OPW - 1) : 0] write_data ); - reg [31 : 0] mem [0 : 255]; - reg [31 : 0] tmp_read_data0; - reg [31 : 0] tmp_read_data1; + reg [(OPW - 1) : 0] mem [0 : ((2**ADW) - 1)]; + reg [(OPW - 1) : 0] tmp_read_data0; + reg [(OPW - 1) : 0] tmp_read_data1; assign read_data0 = tmp_read_data0; assign read_data1 = tmp_read_data1; |