Added another state for setting s_mem_read_addr to allow shortcutting one cycle in each loop.

1 files changed, 5 insertions, 0 deletions

diff --git a/src/rtl/montprod.v b/src/rtl/montprod.v
index 6959833..ee87b97 100644
--- a/src/rtl/montprod.v
+++ b/src/rtl/montprod.v
@@ -319,6 +319,11 @@ module montprod #(parameter OPW = 32, parameter ADW = 8)
             s_mem_read_addr = length_m1;
           end
 
+        CTRL_LOOP_BQ:
+          begin
+            s_mem_read_addr = length_m1;
+          end
+
         CTRL_CALC_ADD:
           begin
             //s = (s + q*M + b*A) >>> 1;, if(b==1) S+= A. Takes (1..length) cycles.