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author | Joachim StroĢmbergson <joachim@secworks.se> | 2015-06-10 09:19:40 +0200 |
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committer | Joachim StroĢmbergson <joachim@secworks.se> | 2015-06-10 09:19:40 +0200 |
commit | dd795a5a44996c5016c47d7c764c836c4a8d94e5 (patch) | |
tree | 73b3433997d45b0bcd8823e0976b2c1277654b34 | |
parent | 22c547c903ee57e47460ae0a026348da3913d7b2 (diff) |
Added cycle counter to the montprod testbench to measure the execution time.
-rw-r--r-- | src/tb/tb_montprod.v | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/src/tb/tb_montprod.v b/src/tb/tb_montprod.v index 601e7f8..f4d04c7 100644 --- a/src/tb/tb_montprod.v +++ b/src/tb/tb_montprod.v @@ -57,10 +57,15 @@ module tb_montprod(); parameter CLK_HALF_PERIOD = 2; parameter CLK_PERIOD = 2 * CLK_HALF_PERIOD; + parameter DISPLAY_TEST_CYCLES = 1; + //---------------------------------------------------------------- // Register and Wire declarations. //---------------------------------------------------------------- + reg [31 : 0] test_cycle_ctr; + reg test_cycle_ctr_rst; + reg test_cycle_ctr_inc; reg tb_clk; reg tb_reset_n; @@ -139,6 +144,55 @@ always end // clk_gen + //---------------------------------------------------------------- + // test_cycle_counter + // + // Used to measure the number of cycles it takes to perform + // a given test case. + //---------------------------------------------------------------- + always @ (posedge tb_clk) + begin + if (test_cycle_ctr_rst) + test_cycle_ctr = 64'h0000000000000000; + + if (test_cycle_ctr_inc) + test_cycle_ctr = test_cycle_ctr + 1; + end + + + //---------------------------------------------------------------- + // start_test_cycle_ctr + // + // Reset and start the test cycle counter. + //---------------------------------------------------------------- + task start_test_cycle_ctr(); + begin + test_cycle_ctr_rst = 1; + #(CLK_PERIOD); + test_cycle_ctr_rst = 0; + + test_cycle_ctr_inc = 1; + end + endtask // start_test_cycle_ctr() + + + //---------------------------------------------------------------- + // stop_test_cycle_ctr() + // + // Stop the test cycle counter and optionally display the + // result. + //---------------------------------------------------------------- + task stop_test_cycle_ctr(); + begin + test_cycle_ctr_inc = 0; + #(CLK_PERIOD); + + if (DISPLAY_TEST_CYCLES) + $display("*** Number of cycles performed during test: 0x%016x", test_cycle_ctr); + end + endtask // stop_test_cycle_ctr() + + //---------------------------------------------------------------- // S monitor //---------------------------------------------------------------- @@ -314,8 +368,14 @@ task test_mont_prod( $display("*** Test vector copied"); wait_ready(); tb_length = length; + + start_test_cycle_ctr(); + signal_calculate(); wait_ready(); + + stop_test_cycle_ctr(); + begin: verify_test_vectors integer i; integer j; |