(1) Removed unneeded default state. (2) Cleanup of testbench and added a bigger test case.

2 files changed, 89 insertions, 21 deletions

diff --git a/src/rtl/modexp.v b/src/rtl/modexp.v
index 58924c5..e8f8a1d 100644
--- a/src/rtl/modexp.v
+++ b/src/rtl/modexp.v
@@ -820,10 +820,7 @@ module modexp(
 
         default:
           begin
-            loop_counter_new = loop_counter_reg;
-            loop_counter_we  = 1'b0;
           end
-
       endcase
     end
 
diff --git a/src/tb/tb_modexp.v b/src/tb/tb_modexp.v
index 3a66a8e..6f9ea19 100644
--- a/src/tb/tb_modexp.v
+++ b/src/tb/tb_modexp.v
@@ -53,6 +53,7 @@ module tb_modexp();
   // Debug output control.
   parameter DEBUG               = 0;
   parameter DEBUG_EI            = 0;
+  parameter DEBUG_RESULT        = 0;
   parameter DISPLAY_TEST_CYCLES = 1;
 
 
@@ -222,9 +223,15 @@ module tb_modexp();
           $display("loop counter %d: ei = %d", dut.loop_counter_reg, dut.ei_reg);
     end
 
+  //----------------------------------------------------------------
+  // z_monitor()
+  //
+  // Displays the contents of the result_mem.
+  //----------------------------------------------------------------
   always @*
-    begin : z_monitor
-      $display("result_mem[0][1] = %x %x",dut.result_mem.mem[0],dut.result_mem.mem[1]);
+    begin : result_monitor
+      if (DEBUG_RESULT)
+        $display("result_mem[0][1] = %x %x",dut.result_mem.mem[0],dut.result_mem.mem[1]);
     end
 
 
@@ -695,6 +702,7 @@ module tb_modexp();
 
 
   //----------------------------------------------------------------
+  // assertEquals
   //----------------------------------------------------------------
   function assertEquals(
       input [31:0] expected,
@@ -717,28 +725,88 @@ module tb_modexp();
 
 
   //----------------------------------------------------------------
+  // autogenerated_BASIC_33bit()
+  //
+  // Task that tests modexp with 33 bit oprerands.
+  //----------------------------------------------------------------
+  task autogenerated_BASIC_33bit();
+    reg [31 : 0] read_data;
+    begin
+      success = 32'h1;
+      tc_ctr = tc_ctr + 1;
+      $display("autogenerated_BASIC_33bit: 00000001946473e1 ** h000000010e85e74f mod 0000000170754797 ");
+
+      write_word({GENERAL_PREFIX, ADDR_MESSAGE_PTR_RST}, 32'h00000000);
+      write_word({GENERAL_PREFIX, ADDR_MESSAGE_DATA}, 32'h00000001);
+      write_word({GENERAL_PREFIX, ADDR_MESSAGE_DATA}, 32'h946473e1);
+
+      write_word({GENERAL_PREFIX, ADDR_EXPONENT_PTR_RST}, 32'h00000000);
+      write_word({GENERAL_PREFIX, ADDR_EXPONENT_DATA}, 32'h00000001);
+      write_word({GENERAL_PREFIX, ADDR_EXPONENT_DATA}, 32'h0e85e74f);
+
+      write_word({GENERAL_PREFIX, ADDR_MODULUS_PTR_RST}, 32'h00000000);
+      write_word({GENERAL_PREFIX, ADDR_MODULUS_DATA}, 32'h00000001);
+      write_word({GENERAL_PREFIX, ADDR_MODULUS_DATA}, 32'h70754797);
+
+      write_word({GENERAL_PREFIX, ADDR_EXPONENT_LENGTH}, 32'h00000002);
+      write_word({GENERAL_PREFIX, ADDR_MODULUS_LENGTH}, 32'h00000002);
+
+      start_test_cycle_ctr();
+
+      // Start processing and wait for ready.
+      write_word({GENERAL_PREFIX, ADDR_CTRL}, 32'h00000001);
+      wait_ready();
+
+      stop_test_cycle_ctr();
+
+      write_word({GENERAL_PREFIX, ADDR_RESULT_PTR_RST}, 32'h00000000);
+      read_word({GENERAL_PREFIX, ADDR_RESULT_DATA}); read_data = tb_read_data; success = success & assertEquals(32'h00000000, read_data);
+      read_word({GENERAL_PREFIX, ADDR_RESULT_DATA}); read_data = tb_read_data; success = success & assertEquals(32'h7761ed4f, read_data);
+
+      if (success !== 1)
+        begin
+          $display("*** ERROR: autogenerated_BASIC_33bit was NOT successful.");
+          error_ctr = error_ctr + 1;
+        end
+      else
+        $display("*** autogenerated_BASIC_33bit success.");
+    end
+  endtask // autogenerated_BASIC_33bit
+
+
+
+  //----------------------------------------------------------------
+  // autogenerated_BASIC_128bit()
+  //
+  // Task that tests modexp with 128 bit operands.
   //----------------------------------------------------------------
-  task autogenerated_BASIC_M4962768465676381896();
+  task autogenerated_BASIC_128bit();
     reg [31 : 0] read_data;
     begin
       success = 32'h1;
       tc_ctr = tc_ctr + 1;
-      $display("autogenerated_BASIC_M4962768465676381896: 00000001946473e1 ** h000000010e85e74f mod 0000000170754797 ");
+      $display("autogenerated_BASIC_128bit");
 
       write_word({GENERAL_PREFIX, ADDR_MESSAGE_PTR_RST}, 32'h00000000);
-      write_word({GENERAL_PREFIX, ADDR_MESSAGE_DATA}, 32'h00000001); //TEMPLATE_MESSAGE_VALUES
-      write_word({GENERAL_PREFIX, ADDR_MESSAGE_DATA}, 32'h946473e1); //TEMPLATE_MESSAGE_VALUES
+      write_word({GENERAL_PREFIX, ADDR_MESSAGE_DATA}, 32'h29462882);
+      write_word({GENERAL_PREFIX, ADDR_MESSAGE_DATA}, 32'h12caa2d5);
+      write_word({GENERAL_PREFIX, ADDR_MESSAGE_DATA}, 32'hb80e1c66);
+      write_word({GENERAL_PREFIX, ADDR_MESSAGE_DATA}, 32'h1006807f);
 
       write_word({GENERAL_PREFIX, ADDR_EXPONENT_PTR_RST}, 32'h00000000);
-      write_word({GENERAL_PREFIX, ADDR_EXPONENT_DATA}, 32'h00000001); //TEMPLATE_EXPONENT_VALUES
-      write_word({GENERAL_PREFIX, ADDR_EXPONENT_DATA}, 32'h0e85e74f); //TEMPLATE_EXPONENT_VALUES
+      write_word({GENERAL_PREFIX, ADDR_EXPONENT_DATA}, 32'h3285c343);
+      write_word({GENERAL_PREFIX, ADDR_EXPONENT_DATA}, 32'h2acbcb0f);
+      write_word({GENERAL_PREFIX, ADDR_EXPONENT_DATA}, 32'h4d023228);
+      write_word({GENERAL_PREFIX, ADDR_EXPONENT_DATA}, 32'h2ecc73db);
 
       write_word({GENERAL_PREFIX, ADDR_MODULUS_PTR_RST}, 32'h00000000);
-      write_word({GENERAL_PREFIX, ADDR_MODULUS_DATA}, 32'h00000001); //TEMPLATE_MODULUS_VALUES
-      write_word({GENERAL_PREFIX, ADDR_MODULUS_DATA}, 32'h70754797); //TEMPLATE_MODULUS_VALUES
+      write_word({GENERAL_PREFIX, ADDR_MODULUS_DATA}, 32'h267d2f2e);
+      write_word({GENERAL_PREFIX, ADDR_MODULUS_DATA}, 32'h51c216a7);
+      write_word({GENERAL_PREFIX, ADDR_MODULUS_DATA}, 32'hda752ead);
+      write_word({GENERAL_PREFIX, ADDR_MODULUS_DATA}, 32'h48d22d89);
 
-      write_word({GENERAL_PREFIX, ADDR_EXPONENT_LENGTH}, 32'h00000002); //TEMPLATE_MESSAGE_LENGTH
-      write_word({GENERAL_PREFIX, ADDR_MODULUS_LENGTH}, 32'h00000002); //TEMPLATE_MODULUS_LENGTH
+      write_word({GENERAL_PREFIX, ADDR_EXPONENT_LENGTH}, 32'h00000004);
+      write_word({GENERAL_PREFIX, ADDR_MODULUS_LENGTH}, 32'h00000004);
 
       start_test_cycle_ctr();
 
@@ -749,18 +817,20 @@ module tb_modexp();
       stop_test_cycle_ctr();
 
       write_word({GENERAL_PREFIX, ADDR_RESULT_PTR_RST}, 32'h00000000);
-      read_word({GENERAL_PREFIX, ADDR_RESULT_DATA}); read_data = tb_read_data; success = success & assertEquals(32'h00000000, read_data); //TEMPLATE_EXPECTED_VALUES
-      read_word({GENERAL_PREFIX, ADDR_RESULT_DATA}); read_data = tb_read_data; success = success & assertEquals(32'h7761ed4f, read_data); //TEMPLATE_EXPECTED_VALUES
+      read_word({GENERAL_PREFIX, ADDR_RESULT_DATA}); read_data = tb_read_data; success = success & assertEquals(32'h0ddc404d, read_data); //TEMPLATE_EXPECTED_VALUES
+      read_word({GENERAL_PREFIX, ADDR_RESULT_DATA}); read_data = tb_read_data; success = success & assertEquals(32'h91600596, read_data); //TEMPLATE_EXPECTED_VALUES
+      read_word({GENERAL_PREFIX, ADDR_RESULT_DATA}); read_data = tb_read_data; success = success & assertEquals(32'h7425a8d8, read_data); //TEMPLATE_EXPECTED_VALUES
+      read_word({GENERAL_PREFIX, ADDR_RESULT_DATA}); read_data = tb_read_data; success = success & assertEquals(32'ha066ca56, read_data); //TEMPLATE_EXPECTED_VALUES
 
       if (success !== 1)
         begin
-          $display("*** ERROR: autogenerated_BASIC_M4962768465676381896 was NOT successful.");
+          $display("*** ERROR: autogenerated_BASIC_128bit was NOT successful.");
           error_ctr = error_ctr + 1;
         end
       else
-        $display("*** autogenerated_BASIC_M4962768465676381896 success.");
+        $display("*** autogenerated_BASIC_128bit success.");
     end
-  endtask // autogenerated_BASIC_M4962768465676381896
+  endtask // autogenerated_BASIC_128bit
 
 
   //----------------------------------------------------------------
@@ -783,7 +853,8 @@ module tb_modexp();
       tc1();
       tc2();
       tc3();
-      autogenerated_BASIC_M4962768465676381896(); // add a broken random test for debugging
+      autogenerated_BASIC_33bit();
+      autogenerated_BASIC_128bit();
 
       display_test_results();
 //      dump_memories();