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authorRob Austein <sra@hactrn.net>2017-03-07 19:46:44 -0500
committerRob Austein <sra@hactrn.net>2017-03-07 19:46:44 -0500
commitab4638f70ee846de7398a3d78d467a9551e508cf (patch)
tree61c330bb0be48daa4faf3830abfa84c9e5f400d7 /rtl/lowlevel/mac16_wrapper.v
parent9fa6e368879d30835880b3bb0e87c8cf13dd9874 (diff)
Promote code common to both ECDSA* cores to separate repository in core/ tree.
Pavel's two ECDSA base point multiplier cores share a fair amount of code. Maintenance issues aside, the duplication confused the Xilinx synthesis tools if one tried to build a single bitstream containing both cores, so we've separated the common code out into this library. The selection of files in this library was done by comparing the rtl trees of the two original core repositories using "diff -rqws" and selecting the files which diff reported as being identical. Also dealt with some cosmetic issues (indentation, Windows-isms, etc).
Diffstat (limited to 'rtl/lowlevel/mac16_wrapper.v')
-rw-r--r--rtl/lowlevel/mac16_wrapper.v70
1 files changed, 35 insertions, 35 deletions
diff --git a/rtl/lowlevel/mac16_wrapper.v b/rtl/lowlevel/mac16_wrapper.v
index b91e518..89dbba1 100644
--- a/rtl/lowlevel/mac16_wrapper.v
+++ b/rtl/lowlevel/mac16_wrapper.v
@@ -2,7 +2,7 @@
//
// mac16_wrapper.v
// -----------------------------------------------------------------------------
-// Wrapper for 16-bit multiplier and 48-bit accumulator.
+// Wrapper for 16-bit multiplier and 48-bit accumulator.
//
// Authors: Pavel Shatov
//
@@ -34,42 +34,42 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
-//------------------------------------------------------------------------------
-
-module mac16_wrapper
- (
- input clk, // clock
- input clr, // clear accumulator (active-high)
- input ce, // enable clock (active-high)
- input [15: 0] a, // operand input
- input [15: 0] b, // operand input
- output [46: 0] s // sum output
- );
-
-
- //
- // Include Primitive Selector
- //
+//------------------------------------------------------------------------------
+
+module mac16_wrapper
+ (
+ input clk, // clock
+ input clr, // clear accumulator (active-high)
+ input ce, // enable clock (active-high)
+ input [15: 0] a, // operand input
+ input [15: 0] b, // operand input
+ output [46: 0] s // sum output
+ );
+
+
+ //
+ // Include Primitive Selector
+ //
`include "ecdsa_lowlevel_settings.v"
- //
- // Instantiate Vendor/Generic Primitive
- //
- `MAC16_PRIMITIVE mac16_inst
- (
- .clk(clk),
- .clr(clr),
- .ce(ce),
- .a(a),
- .b(b),
- .s(s)
- );
-
-
-endmodule
-
-
+ //
+ // Instantiate Vendor/Generic Primitive
+ //
+ `MAC16_PRIMITIVE mac16_inst
+ (
+ .clk(clk),
+ .clr(clr),
+ .ce(ce),
+ .a(a),
+ .b(b),
+ .s(s)
+ );
+
+
+endmodule
+
+
//------------------------------------------------------------------------------
// End-of-File
-//------------------------------------------------------------------------------
+//------------------------------------------------------------------------------