From fbcbd4218e2711da279d8097620a5b26637bf45b Mon Sep 17 00:00:00 2001 From: "Pavel V. Shatov (Meister)" Date: Wed, 19 Dec 2018 15:27:04 +0300 Subject: Added primitives with clock enable ports. Added primitives from ModExp. --- lowlevel/artix7/dsp48e1_wrapper_modexp.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'lowlevel/artix7/dsp48e1_wrapper_modexp.v') diff --git a/lowlevel/artix7/dsp48e1_wrapper_modexp.v b/lowlevel/artix7/dsp48e1_wrapper_modexp.v index 17d8efe..27c8bf8 100644 --- a/lowlevel/artix7/dsp48e1_wrapper_modexp.v +++ b/lowlevel/artix7/dsp48e1_wrapper_modexp.v @@ -36,7 +36,7 @@ // //------------------------------------------------------------------------------ -module modexpa7_dsp48e1_wrapper_modexp # +module dsp48e1_wrapper_modexp # ( parameter AREG = 1'b0, parameter PREG = 1'b0, -- cgit v1.2.3