#=================================================================== # # Makefile # -------- # Makefile for building sha512 wmem, core and top simulations. # # # Author: Joachim Strombergson # Copyright (c) 2014, NORDUnet A/S # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions are # met: # - Redistributions of source code must retain the above copyright notice, # this list of conditions and the following disclaimer. # # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # # - Neither the name of the NORDUnet nor the names of its contributors may # be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS # IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED # TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A # PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT # HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED # TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR # PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF # LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # #=================================================================== CORE_SRC=../src/rtl/sha512_core.v ../src/rtl/sha512_h_constants.v ../src/rtl/sha512_k_constants.v ../src/rtl/sha512_w_mem.v CORE_TB_SRC=../src/tb/tb_sha512_core.v TOP_SRC=../src/rtl/sha512.v TOP_TB_SRC=../src/tb/tb_sha512.v CC=iverilog CC_FLAGS= -Wall LINT=verilator LINT_FLAGS = +1364-2001ext+ --lint-only -Wall -Wno-fatal -Wno-DECLFILENAME all: top.sim core.sim top.sim: $(TOP_TB_SRC) $(TOP_SRC) $(CORE_SRC) $(CC) $(CC_FLAGS) -o top.sim $(TOP_TB_SRC) $(TOP_SRC) $(CORE_SRC) core.sim: $(CORE_TB_SRC) $(CORE_SRC) $(CC) $(CC_FLAGS) -o core.sim $(CORE_SRC) $(CORE_TB_SRC) sim-top: top.sim ./top.sim sim-core: core.sim ./core.sim lint: $(TOP_SRC) $(CORE_SRC) $(LINT) $(LINT_FLAGS) $(TOP_SRC) $(CORE_SRC) clean: rm -f top.sim rm -f core.sim help: @echo "Supported targets:" @echo "------------------" @echo "all: Build all simulation targets." @echo "top: Build the top simulation target." @echo "core: Build the core simulation target." @echo "sim-top: Run top level simulation." @echo "sim-core: Run core level simulation." @echo "clean: Delete all built files." #=================================================================== # EOF Makefile #=================================================================== dd93cf5f'>libhal-test/Makefile
blob: 1a2106ee2f873493ddf5068a7ac0d90e13cce035 (plain) (blame)
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TEST = cores test-bus test-trng test-hash test-aes-key-wrap test-pbkdf2 test-ecdsa test-rsa test-mkmif

CFLAGS += -I $(LIBHAL_SRC)
LIBC_OBJS = printf.o gettimeofday.o
LIBS += $(LIBHAL_BLD)/libhal.a $(LIBTFM_BLD)/libtfm.a

all: $(TEST:=.elf)

vpath %.c $(LIBHAL_SRC)/tests $(LIBHAL_SRC)/utils

# .mo extension for files with main() that need to be wrapped as __main()
%.mo: %.c
	$(CC) -c $(CFLAGS) -Dmain=__main -o $@ $<

%.elf: %.mo main.o $(BOARD_OBJS) $(LIBC_OBJS) $(LIBS)
	$(CC) $(CFLAGS) $^ -o $*.elf -T$(LDSCRIPT) -g -Wl,-Map=$*.map
	$(OBJCOPY) -O binary $*.elf $*.bin
	$(SIZE) $*.elf

clean:
	rm -f *.o *.mo
	rm -f *.elf
	rm -f *.bin
	rm -f *.map