| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2021-06-07 | Add mode bits for the various flavors of SHA-3, so that the softwaresha3_mode | Paul Selkirk | |
| driver doesn't have to know that the internal block size is actually 1600 bits. This involves having the "init" state zero-extend the block data, and having "next" only absorb the block bits for that mode. | |||
| 2021-06-06 | The SHA-3 algorithm really wants everything to be little-endian, which is | Paul Selkirk | |
| at odds with everything else in our system (including the register interface to sha3_wrapper). Rather than trying to rewrite sha3, I'll isolate it in its own little-endian universe by byte-swapping all reads and writes. | |||
| 2017-12-05 | Added new testbench. | Pavel V. Shatov (Meister) | |
| 2016-08-24 | Making ModelSim happy with the testbench. Not as easy making ModelSim be ↵ | Joachim Strömbergson | |
| friends with the sha3 core. Nor Icarus or Verilator. | |||
| 2016-08-23 | Writing test data into the core regs. | Joachim Strömbergson | |
| 2016-08-23 | Adding functionality in sha3 tb to be able to build a baseline. | Joachim Strömbergson | |
| 2015-12-13 | whack copyrights | Paul Selkirk | |
| 2015-03-13 | Adding initial version of tb for sha3 core. | Joachim Strömbergson | |
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index : core/hash/sha3 | |
| Verilog implementation sponge construction defined in the SHA-3 hash standard | git repositories |
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