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authorPaul Selkirk <paul@psgd.org>2021-06-02 16:11:17 -0400
committerPaul Selkirk <paul@psgd.org>2021-06-02 16:11:17 -0400
commit4c32ceb2f2df74de8996b9a76667643feb18f4e6 (patch)
treebb7019d8ee4736d15e03c85a73ad43c8a2bce0f2 /src/rtl/sha3.v
parent9c5acbbcd7928a2958d370923d9cc0276037f1aa (diff)
Change reads from clocked to unclocked to match read timing of other cores.
Diffstat (limited to 'src/rtl/sha3.v')
-rw-r--r--src/rtl/sha3.v8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/rtl/sha3.v b/src/rtl/sha3.v
index b01d50c..ee29ba6 100644
--- a/src/rtl/sha3.v
+++ b/src/rtl/sha3.v
@@ -98,11 +98,11 @@ module sha3( input wire clk,
/* the lowest address bit determines what part of 64-bit word to return */
- always @(posedge clk)
+ always @*
//
- dout <= addr[8] ?
- (~addr[2] ? st [addr[7:3]][31:0] : st [addr[7:3]][63:32]) :
- (~addr[2] ? blk[addr[7:3]][31:0] : blk[addr[7:3]][63:32]) ;
+ dout = addr[8] ?
+ (~addr[2] ? st [addr[7:3]][31:0] : st [addr[7:3]][63:32]) :
+ (~addr[2] ? blk[addr[7:3]][31:0] : blk[addr[7:3]][63:32]) ;
always @* begin