From caf3ad473fc5325af2146274aebe2f7c66dbd63d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= Date: Tue, 8 Jan 2019 09:55:33 +0100 Subject: Ported the timing fix from SHA-512 to SHA-256. The core can now run at 170 MHz in the target FPGA. --- src/rtl/sha256_core.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/rtl/sha256_core.v') diff --git a/src/rtl/sha256_core.v b/src/rtl/sha256_core.v index 048df2b..564d45e 100644 --- a/src/rtl/sha256_core.v +++ b/src/rtl/sha256_core.v @@ -564,6 +564,7 @@ module sha256_core( CTRL_ROUNDS0: begin + w_next = 1'h1; state_update = 1'h1; sha256_ctrl_new = CTRL_ROUNDS1; sha256_ctrl_we = 1'h1; @@ -572,7 +573,6 @@ module sha256_core( CTRL_ROUNDS1: begin - w_next = 1'h1; state_update = 1'h1; a_h_we = 1'h1; t_ctr_inc = 1'h1; -- cgit v1.2.3