| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2015-03-17 | Rearrange cores. | Paul Selkirk | |
| 2014-11-07 | Changed to asynch reset. | Joachim Strömbergson | |
| 2014-03-17 | Removed redundant flag reset wires. | Joachim Strömbergson | |
| 2014-03-16 | Adding self resetting init and next flags. Updating TBs to not reset the ↵ | Joachim Strömbergson | |
| flags. Fixing clock parameter naming. | |||
| 2014-03-15 | (1) Updated interface to new std. (2) Added missing input designation in ↵ | Joachim Strömbergson | |
| tasks. Now simumaltion with ModelSim works. | |||
| 2014-02-19 | Adding top level wrapper for the sha256. This wrapper provides a simple ↵ | Joachim Strömbergson | |
| memory like interface. | |||
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index : core/hash/sha256 | |
| Verilog implementation of the SHA-256 cryptographic hash function | git repositories |
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