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-rw-r--r--src/rtl/sha256_core.v6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/rtl/sha256_core.v b/src/rtl/sha256_core.v
index d4330d9..a88a359 100644
--- a/src/rtl/sha256_core.v
+++ b/src/rtl/sha256_core.v
@@ -183,10 +183,10 @@ module sha256_core(
//----------------------------------------------------------------
// reg_update
// Update functionality for all registers in the core.
- // All registers are positive edge triggered with synchronous
- // active low reset. All registers have write enable.
+ // All registers are positive edge triggered with
+ // asynchronous active low reset.
//----------------------------------------------------------------
- always @ (posedge clk)
+ always @ (posedge clk or negedge reset_n)
begin : reg_update
if (!reset_n)
begin