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-rw-r--r--src/rtl/sha256.v113
-rw-r--r--src/tb/tb_sha256.v11
-rw-r--r--src/tb/tb_sha256_core.v15
3 files changed, 103 insertions, 36 deletions
diff --git a/src/rtl/sha256.v b/src/rtl/sha256.v
index 06ebd3d..d9acc24 100644
--- a/src/rtl/sha256.v
+++ b/src/rtl/sha256.v
@@ -103,8 +103,16 @@ module sha256(
// Registers including update variables and write enable.
//----------------------------------------------------------------
reg init_reg;
+ reg init_new;
+ reg init_we;
+ reg init_set;
+ reg init_rst;
+
reg next_reg;
- reg ctrl_we;
+ reg next_new;
+ reg next_we;
+ reg next_set;
+ reg next_rst;
reg ready_reg;
@@ -233,10 +241,14 @@ module sha256(
ready_reg <= core_ready;
digest_valid_reg <= core_digest_valid;
- if (ctrl_we)
+ if (init_we)
begin
- init_reg <= write_data[CTRL_INIT_BIT];
- next_reg <= write_data[CTRL_NEXT_BIT];
+ init_reg <= init_new;
+ end
+
+ if (next_we)
+ begin
+ next_reg <= next_new;
end
if (core_digest_valid)
@@ -329,6 +341,42 @@ module sha256(
//----------------------------------------------------------------
+ // flag_reset
+ //
+ // Logic to reset init and next flags that has been set.
+ //----------------------------------------------------------------
+ always @*
+ begin : flag_reset
+ init_new = 0;
+ init_we = 0;
+ next_new = 0;
+ next_we = 0;
+
+ if (init_set)
+ begin
+ init_new = 1;
+ init_we = 1;
+ end
+ else if (init_reg)
+ begin
+ init_new = 0;
+ init_we = 1;
+ end
+
+ if (next_set)
+ begin
+ next_new = 1;
+ next_we = 1;
+ end
+ else if (next_reg)
+ begin
+ next_new = 0;
+ next_we = 1;
+ end
+ end
+
+
+ //----------------------------------------------------------------
// api_logic
//
// Implementation of the api logic. If cs is enabled will either
@@ -336,25 +384,28 @@ module sha256(
//----------------------------------------------------------------
always @*
begin : api_logic
- ctrl_we = 0;
- block0_we = 0;
- block1_we = 0;
- block2_we = 0;
- block3_we = 0;
- block4_we = 0;
- block5_we = 0;
- block6_we = 0;
- block7_we = 0;
- block8_we = 0;
- block9_we = 0;
- block10_we = 0;
- block11_we = 0;
- block12_we = 0;
- block13_we = 0;
- block14_we = 0;
- block15_we = 0;
+ init_set = 0;
+ init_rst = 0;
+ next_set = 0;
+ next_rst = 0;
+ block0_we = 0;
+ block1_we = 0;
+ block2_we = 0;
+ block3_we = 0;
+ block4_we = 0;
+ block5_we = 0;
+ block6_we = 0;
+ block7_we = 0;
+ block8_we = 0;
+ block9_we = 0;
+ block10_we = 0;
+ block11_we = 0;
+ block12_we = 0;
+ block13_we = 0;
+ block14_we = 0;
+ block15_we = 0;
tmp_read_data = 32'h00000000;
- tmp_error = 0;
+ tmp_error = 0;
if (cs)
begin
@@ -364,7 +415,23 @@ module sha256(
// Write operations.
ADDR_CTRL:
begin
- ctrl_we = 1;
+ if (write_data[CTRL_INIT_BIT])
+ begin
+ init_set = 1;
+ end
+ else
+ begin
+ init_rst = 1;
+ end
+
+ if (write_data[CTRL_NEXT_BIT])
+ begin
+ next_set = 1;
+ end
+ else
+ begin
+ next_rst = 1;
+ end
end
ADDR_BLOCK0:
diff --git a/src/tb/tb_sha256.v b/src/tb/tb_sha256.v
index 69f2186..72e7d21 100644
--- a/src/tb/tb_sha256.v
+++ b/src/tb/tb_sha256.v
@@ -53,6 +53,7 @@ module tb_sha256();
parameter DEBUG = 0;
parameter CLK_HALF_PERIOD = 2;
+ parameter CLK_PERIOD = 2 * CLK_HALF_PERIOD;
// The address map.
parameter ADDR_NAME0 = 8'h00;
@@ -297,7 +298,7 @@ module tb_sha256();
tb_write_data = word;
tb_cs = 1;
tb_we = 1;
- #(2 * CLK_HALF_PERIOD);
+ #(CLK_PERIOD);
tb_cs = 0;
tb_we = 0;
end
@@ -343,7 +344,7 @@ module tb_sha256();
tb_address = address;
tb_cs = 1;
tb_we = 0;
- #(2 * CLK_HALF_PERIOD);
+ #(CLK_PERIOD);
read_data = tb_read_data;
tb_cs = 0;
@@ -424,7 +425,7 @@ module tb_sha256();
write_block(block);
write_word(ADDR_CTRL, CTRL_INIT_VALUE);
- write_word(ADDR_CTRL, 8'h00);
+ #(CLK_PERIOD);
wait_ready();
read_digest();
@@ -463,7 +464,7 @@ module tb_sha256();
// First block
write_block(block0);
write_word(ADDR_CTRL, CTRL_INIT_VALUE);
- write_word(ADDR_CTRL, 8'h00);
+ #(CLK_PERIOD);
wait_ready();
read_digest();
@@ -482,7 +483,7 @@ module tb_sha256();
// Final block
write_block(block1);
write_word(ADDR_CTRL, CTRL_NEXT_VALUE);
- write_word(ADDR_CTRL, 8'h00);
+ #(CLK_PERIOD);
wait_ready();
read_digest();
diff --git a/src/tb/tb_sha256_core.v b/src/tb/tb_sha256_core.v
index 2f2a288..df0cafc 100644
--- a/src/tb/tb_sha256_core.v
+++ b/src/tb/tb_sha256_core.v
@@ -6,7 +6,8 @@
//
//
// Author: Joachim Strombergson
-// Copyright (c) 2014 SUNET
+// Copyright (c) 2014, SUNET
+// All rights reserved.
//
// Redistribution and use in source and binary forms, with or
// without modification, are permitted provided that the following
@@ -52,6 +53,7 @@ module tb_sha256_core();
parameter DEBUG = 0;
parameter CLK_HALF_PERIOD = 2;
+ parameter CLK_PERIOD = 2 * CLK_HALF_PERIOD;
//----------------------------------------------------------------
@@ -243,7 +245,7 @@ module tb_sha256_core();
begin
while (!tb_ready)
begin
- #(2 * CLK_HALF_PERIOD);
+ #(CLK_PERIOD);
end
end
endtask // wait_ready
@@ -263,8 +265,7 @@ module tb_sha256_core();
tb_block = block;
tb_init = 1;
- #(2 * CLK_HALF_PERIOD);
- tb_init = 0;
+ #(CLK_PERIOD);
wait_ready();
@@ -308,8 +309,7 @@ module tb_sha256_core();
$display("*** TC %0d first block started.", tc_number);
tb_block = block1;
tb_init = 1;
- #(2 * CLK_HALF_PERIOD);
- tb_init = 0;
+ #(CLK_PERIOD);
wait_ready();
db_digest1 = tb_digest;
$display("*** TC %0d first block done.", tc_number);
@@ -317,8 +317,7 @@ module tb_sha256_core();
$display("*** TC %0d second block started.", tc_number);
tb_block = block2;
tb_next = 1;
- #(2 * CLK_HALF_PERIOD);
- tb_next = 0;
+ #(CLK_PERIOD);
wait_ready();
$display("*** TC %0d second block done.", tc_number);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-22 22:18:31 +0000