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authorJoachim StroĢˆmbergson <joachim@secworks.se>2014-03-17 09:09:14 +0100
committerJoachim StroĢˆmbergson <joachim@secworks.se>2014-03-17 09:09:14 +0100
commit772560966804c97c7d27c2ac49b9a5e5e0b5453d (patch)
treeda446bffaf289aed391367a8446c0c70a1332118
parentc33d1df5f95b1baadee66aa464d6af4a2c849966 (diff)
Removed redundant flag reset wires.
-rw-r--r--src/rtl/sha256.v23
1 files changed, 2 insertions, 21 deletions
diff --git a/src/rtl/sha256.v b/src/rtl/sha256.v
index d9acc24..cd33a76 100644
--- a/src/rtl/sha256.v
+++ b/src/rtl/sha256.v
@@ -106,13 +106,11 @@ module sha256(
reg init_new;
reg init_we;
reg init_set;
- reg init_rst;
reg next_reg;
reg next_new;
reg next_we;
reg next_set;
- reg next_rst;
reg ready_reg;
@@ -385,9 +383,7 @@ module sha256(
always @*
begin : api_logic
init_set = 0;
- init_rst = 0;
next_set = 0;
- next_rst = 0;
block0_we = 0;
block1_we = 0;
block2_we = 0;
@@ -415,23 +411,8 @@ module sha256(
// Write operations.
ADDR_CTRL:
begin
- if (write_data[CTRL_INIT_BIT])
- begin
- init_set = 1;
- end
- else
- begin
- init_rst = 1;
- end
-
- if (write_data[CTRL_NEXT_BIT])
- begin
- next_set = 1;
- end
- else
- begin
- next_rst = 1;
- end
+ init_set = write_data[CTRL_INIT_BIT];
+ next_set = write_data[CTRL_NEXT_BIT];
end
ADDR_BLOCK0: