From 75b908ff8480edd67f342999f7a8dcb834702fc1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= Date: Thu, 13 Mar 2014 15:39:06 +0100 Subject: Adding license and readme files for the uart. --- README.md | 9 +++++++++ 1 file changed, 9 insertions(+) create mode 100644 README.md (limited to 'README.md') diff --git a/README.md b/README.md new file mode 100644 index 0000000..5361cd0 --- /dev/null +++ b/README.md @@ -0,0 +1,9 @@ +uart +==== + +A Universal asynchronous receiver/transmitter (UART) implemented in Verilog. + +This UART used to be in coretest, but has been moved out as a separate +project. + + -- cgit v1.2.3