| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2014-03-13 | Adding testbench for the uart. | Joachim StroĢmbergson | |
 |
index : core/comm/uart | |
| A Universal asynchronous receiver/transmitter (UART) implemented in Verilog | git repositories |
| aboutsummaryrefslogtreecommitdiff |