Update of core address size to 8 bits. Changed use of bit rate, data and stop bits from the top.

1 files changed, 5 insertions, 5 deletions

diff --git a/src/tb/tb_uart.v b/src/tb/tb_uart.v
index 20a390e..1abdd34 100644
--- a/src/tb/tb_uart.v
+++ b/src/tb/tb_uart.v
@@ -72,7 +72,7 @@ module tb_uart();
   wire          tb_txd_ack;
   reg           tb_cs;
   reg           tb_we;
-  reg [3 : 0]   tb_address;
+  reg [7 : 0]   tb_address;
   reg [31 : 0]  tb_write_data;
   wire [31 : 0] tb_read_data;
   wire          tb_error;
@@ -265,7 +265,7 @@ module tb_uart();
       tb_rxd        = 1;
       tb_cs         = 0;
       tb_we         = 0;
-      tb_address    = 4'h0;
+      tb_address    = 8'h00;
       tb_write_data = 32'h00000000;
       
       txd_state     = 1;
@@ -288,20 +288,20 @@ module tb_uart();
       // Start bit
       $display("*** Transmitting start bit.");
       tb_rxd = 0;
-      #(CLK_PERIOD * dut.core.DEFAULT_CLK_RATE);
+      #(CLK_PERIOD * dut.DEFAULT_BIT_RATE);
 
       // Send the bits LSB first.
       for (i = 0 ; i < 8 ; i = i + 1)
         begin
           $display("*** Transmitting data[%1d] = 0x%01x.", i, data[i]);
           tb_rxd = data[i];
-          #(CLK_PERIOD * dut.core.DEFAULT_CLK_RATE);
+          #(CLK_PERIOD * dut.DEFAULT_BIT_RATE);
         end
 
       // Send two stop bits. I.e. two bit times high (mark) value.
       $display("*** Transmitting two stop bits.");
       tb_rxd = 1;
-      #(2 * CLK_PERIOD * dut.core.DEFAULT_CLK_RATE * dut.core.DEFAULT_STOP_BITS);
+      #(2 * CLK_PERIOD * dut.DEFAULT_BIT_RATE * dut.DEFAULT_STOP_BITS);
       $display("*** End of transmission.");
     end
   endtask // transmit_byte